KR960018736A - 액정표시장치용 박막 트랜지스터의 제조방법 - Google Patents
액정표시장치용 박막 트랜지스터의 제조방법 Download PDFInfo
- Publication number
- KR960018736A KR960018736A KR1019940031949A KR19940031949A KR960018736A KR 960018736 A KR960018736 A KR 960018736A KR 1019940031949 A KR1019940031949 A KR 1019940031949A KR 19940031949 A KR19940031949 A KR 19940031949A KR 960018736 A KR960018736 A KR 960018736A
- Authority
- KR
- South Korea
- Prior art keywords
- gate insulating
- insulating film
- forming
- liquid crystal
- crystal display
- Prior art date
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 8
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 239000010409 thin film Substances 0.000 title claims abstract description 8
- 239000010408 film Substances 0.000 claims abstract 16
- 238000000034 method Methods 0.000 claims abstract 11
- 239000004065 semiconductor Substances 0.000 claims abstract 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract 3
- 239000000758 substrate Substances 0.000 claims abstract 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims abstract 2
- 230000003647 oxidation Effects 0.000 claims abstract 2
- 238000007254 oxidation reaction Methods 0.000 claims abstract 2
- 229920005591 polysilicon Polymers 0.000 claims abstract 2
- 239000012535 impurity Substances 0.000 claims 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 239000011521 glass Substances 0.000 claims 1
- 239000011261 inert gas Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 239000010453 quartz Substances 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 1
- 239000002253 acid Substances 0.000 abstract 1
- 230000015556 catabolic process Effects 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 230000006866 deterioration Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
본 발명은 액정표시장치용 박막 트랜지스터의 제조방법에 관한 것으로서, 반도체층 패턴이 형성되어 있는 투명기판상에 고온 건식산하법으로 예정된 두께의 제1게이트절연막을 형성하고 그 상층에 저온 LPCVD 방법으로 나머지 두께의 제2게이트절연막을 형성한 후, 게이트전극과 소오스/드레인전극을 형성하여 TFT를 완성하였으므로, 반도체층 패턴과 게이트절연막과의 계면 상태가 우수하여 누설절류가 작아지고 산화막의 항복전압이 증가되며, 다결정실리콘층으로 된 반도체층 패턴상에서 그레인 및 그레인 바운더리간의 막성장 속도차에 의한 토폴로지 악화등의 불량을 방지하고, 산화공정시간을 단축시켜 공정수율 및 소자동작의 신뢰성을 향상시킬 수 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 내지 제2C도는 본 발명에 따른 액정표시장치용 박막 트랜지스터의 제조공정도.
Claims (10)
- 투명기판상에 반도체층 패턴을 형성하는 공정과, 상기 구조의 전표면에 고온 건식산화방법으로 예정된 두께의 제1게이트절연막을 형성하는 공정과, 상기 제1게이트절연막상에 저온 LPCVD 방법으로 나머지 두께의 제2게이트절연막을 형성하는 공정과, 상기 반도체층 패턴의 채널로 예정되어 있는 부분 상측의 제2게이트 절연막상에 게이트너극을 형성하는 공정과, 상기 구조의 전표면에 필드산화막을 형성하는 공정과, 상기 고농도 불순물층의 일측 상부의 필드산화막과 제2 및 제1게이트절연막이 순차적으로 제거하여 상기 고농도 불순물층을 노출시키는 콘택홀을 형성하는 공정과, 상기 콘택홀을 통하여 상기 고농도 불수물층과 접촉되는 소오소/드레인 전극을 형성하는 공정을 구비하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 투명기판을 석영 또는 유리재질로 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 반도체층을 다결정실리콘으로 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 제1게이트절연막을 700∼1000℃ 온도에서 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 제2게이트절연막을 250∼700℃온도에서 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 제1 및 제2게이트절연막을 각각 전체 두께의 20∼50％ 및 50∼80％두께 비로 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제6항에 있어서, 상기 제1 및 제2게이트절연막을 각각 전체 두께의 3:7비율로 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 제2게이트절연막을 질소 또는 불활성가스 분위기에서 700∼1000℃온도에서 열처리 하는 공정을 구비하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 게이트전극을 다결정실리콘층으로 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.
- 제1항에 있어서, 상기 소오스/드레인전극이 Cr, Ti 및 Al 중 어느 하나로 형성하는 것을 특징으로 하는 액정표시장치용 박막 트랜지스터의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940031949A KR960018736A (ko) | 1994-11-30 | 1994-11-30 | 액정표시장치용 박막 트랜지스터의 제조방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940031949A KR960018736A (ko) | 1994-11-30 | 1994-11-30 | 액정표시장치용 박막 트랜지스터의 제조방법 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR960018736A true KR960018736A (ko) | 1996-06-17 |
Family
ID=55313582
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940031949A KR960018736A (ko) | 1994-11-30 | 1994-11-30 | 액정표시장치용 박막 트랜지스터의 제조방법 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR960018736A (ko) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7190421B2 (en) | 1999-09-30 | 2007-03-13 | Samsung Electronics, Co., Ltd | Thin film transistor array panel for a liquid crystal display and methods for manufacturing the same |
| KR100739366B1 (ko) * | 1999-12-20 | 2007-07-16 | 엘지.필립스 엘시디 주식회사 | 박막 트랜지스터 및 그 제조방법 |
| KR100767354B1 (ko) * | 2000-09-04 | 2007-10-16 | 삼성전자주식회사 | 박막 트랜지스터 기판 및 그 제조방법 |
-
1994
- 1994-11-30 KR KR1019940031949A patent/KR960018736A/ko not_active Application Discontinuation
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7190421B2 (en) | 1999-09-30 | 2007-03-13 | Samsung Electronics, Co., Ltd | Thin film transistor array panel for a liquid crystal display and methods for manufacturing the same |
| US7220991B2 (en) | 1999-09-30 | 2007-05-22 | Samsung Electronics Co., Ltd. | Thin film transistor array panel for liquid crystal display |
| KR100739366B1 (ko) * | 1999-12-20 | 2007-07-16 | 엘지.필립스 엘시디 주식회사 | 박막 트랜지스터 및 그 제조방법 |
| KR100767354B1 (ko) * | 2000-09-04 | 2007-10-16 | 삼성전자주식회사 | 박막 트랜지스터 기판 및 그 제조방법 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E902 | Notification of reason for refusal | ||
| E601 | Decision to refuse application |