KR960009009A - 반도체소자 제조방법 - Google Patents

반도체소자 제조방법 Download PDF

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Publication number
KR960009009A
KR960009009A KR1019940021062A KR19940021062A KR960009009A KR 960009009 A KR960009009 A KR 960009009A KR 1019940021062 A KR1019940021062 A KR 1019940021062A KR 19940021062 A KR19940021062 A KR 19940021062A KR 960009009 A KR960009009 A KR 960009009A
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KR
South Korea
Prior art keywords
semiconductor device
well
improve
ion
manufacturing
Prior art date
Application number
KR1019940021062A
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English (en)
Other versions
KR0124650B1 (ko
Inventor
신호철
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019940021062A priority Critical patent/KR0124650B1/ko
Publication of KR960009009A publication Critical patent/KR960009009A/ko
Application granted granted Critical
Publication of KR0124650B1 publication Critical patent/KR0124650B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체소자 제조방법에 관한 것으로, 웰 확산시간을 단축시킴으로써 공정시간 단축에 따른 생산성 및 수율을 향상시키기 위한 것이다.
본 발명의 기판내의 소정영역에 각각 1.00E＋13∼1.15E＋13의 도우즈량 n형 불순물을 이온주입하고, 3.2E＋12∼3.65E＋12의 도우즈량으로 p형 불순물을 이온주입한 후, 1100∼1300℃의 온도에서 2∼3시간 동안 불순물의 확산공정을 행하는 것을 특징으로 하는 반도체 소자 제조방법을 제공함으로써 n웰과 p웰의 이온주입조건 변경만으로 웰확산공정시의 확산시간을 기존의 경우보다 50% 이상 단축하여 공정원가의 절감, 공정시간단축으로 인한 생산성 향상, 장비 이물질 감소, 반도체소자의 수율향상 등의 효과를 얻는다.

Description

반도체소자 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 의한 웰확산공정의 진행과정을 도시한 도면.

Claims (1)

  1. 기판내의 소정영역에 각각 1.00E＋13∼1.15E＋13의 도우즈량으로 n형 불순물을 이온주입하고, 3.2E＋12∼3.65E＋12의 도우즈량으로 p형 불순물을 이온주입한 후, 1100∼1300℃의 온도에서 2∼3시간 동안 불순물의 확산공정을 행하는 것을 특징으로 하는 반도체소자 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940021062A 1994-08-25 1994-08-25 반도체소자 제조방법 KR0124650B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940021062A KR0124650B1 (ko) 1994-08-25 1994-08-25 반도체소자 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940021062A KR0124650B1 (ko) 1994-08-25 1994-08-25 반도체소자 제조방법

Publications (2)

Publication Number Publication Date
KR960009009A true KR960009009A (ko) 1996-03-22
KR0124650B1 KR0124650B1 (ko) 1997-12-10

Family

ID=19391139

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940021062A KR0124650B1 (ko) 1994-08-25 1994-08-25 반도체소자 제조방법

Country Status (1)

Country Link
KR (1) KR0124650B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100748633B1 (ko) * 2001-12-21 2007-08-10 가부시키가이샤 유야마 세이사쿠쇼 약포체반송장치

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100748633B1 (ko) * 2001-12-21 2007-08-10 가부시키가이샤 유야마 세이사쿠쇼 약포체반송장치

Also Published As

Publication number Publication date
KR0124650B1 (ko) 1997-12-10

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