KR960002569A - How to Form Metal Wiring Alignment Keys - Google Patents

How to Form Metal Wiring Alignment Keys Download PDF

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Publication number
KR960002569A
KR960002569A KR1019940014491A KR19940014491A KR960002569A KR 960002569 A KR960002569 A KR 960002569A KR 1019940014491 A KR1019940014491 A KR 1019940014491A KR 19940014491 A KR19940014491 A KR 19940014491A KR 960002569 A KR960002569 A KR 960002569A
Authority
KR
South Korea
Prior art keywords
layer
metal layer
planarization
metal wiring
insulating film
Prior art date
Application number
KR1019940014491A
Other languages
Korean (ko)
Other versions
KR0172467B1 (en
Inventor
김헌도
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940014491A priority Critical patent/KR0172467B1/en
Publication of KR960002569A publication Critical patent/KR960002569A/en
Application granted granted Critical
Publication of KR0172467B1 publication Critical patent/KR0172467B1/en

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Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/708—Mark formation

Abstract

본 발명은 웨이퍼 스크라이브 라인 영역의 절연막(2) 소정 부위를 식각하는 단계; 전체구조 상부에 확산방지금속층(3), 평탄화 금속층(4), 반사 방지층(5)을 순차적으로 형성하는 단계; 상기 절연막(2) 식각 부위 상부의 반사방지층(5) 및 평탄화 금속층(4)을 제거하는 단계를 포함하여 이루어지는 것을 특징으로 하는 금속 배선 얼라인 키 형성 방법에 관한 것으로, 얼라인 관련 키의 손상이 없고 표면이 깨끗한 키를 얻을 수 있어 배선 마스크 작업을 용이하고 정확하게 할 수 있음으로, 반도체 소자의 신뢰도 및 수율을 향상시키는 효과가 있다.The present invention includes etching a predetermined portion of the insulating film 2 in the wafer scribe line region; Sequentially forming an anti-diffusion metal layer 3, a planarization metal layer 4, and an anti-reflection layer 5 on the entire structure; And removing the anti-reflection layer (5) and the planarization metal layer (4) on the etched portion of the insulating film (2). Since a key having a clean surface can be obtained and wiring mask operation can be easily and accurately performed, there is an effect of improving reliability and yield of a semiconductor device.

Description

금속 배선 얼라인 키 형성 방법How to Form Metal Wiring Alignment Keys

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1E도는 본 발명에 따른 얼라인 키 형성 공정도.1E is an alignment key forming process diagram according to the present invention.

Claims (2)

웨이퍼 스크라이브 라인 영역의 절연막(2) 소정 부위를 식각하는 단계; 전체구조 상부에 확산방지 금속층(3), 평탄화 금속층(4), 반사 방지층(5)을 순차적으로 형성하는 단계; 상기 절연막(2) 식각 부위 상부의 반사방지층(5) 및 평탄화 금속층(4)을 제거하는 단계를 포함하여 이루어지는 것을 특징으로 하는 금속 배선 얼라인 키 형성방법.Etching a predetermined portion of the insulating film 2 in the wafer scribe line region; Sequentially forming an anti-diffusion metal layer 3, a planarization metal layer 4, and an anti-reflection layer 5 on the entire structure; And removing the anti-reflection layer (5) and the planarization metal layer (4) on the etched portion of the insulating layer (2). 제1항에 있어서; 상기 절연막(2) 식각 부위 상부의 반사방지층(5) 및 평탄화 금속층(4)을 제거하는 단계는 마스크 패턴(7)을 형성하고 건식식각하는 단계와, 마스크 패턴(7)을 제거한 후 습식식각하는 단계로 이루어지는 것을 특징으로 하는 금속 배선 얼라인 키 형성방법.The method of claim 1; Removing the antireflection layer 5 and the planarization metal layer 4 on the etching portion of the insulating layer 2 may include forming and masking the mask pattern 7, and wet etching after removing the mask pattern 7. A metal wiring alignment key forming method, comprising the steps of: ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940014491A 1994-06-23 1994-06-23 Fabrication method of semiconductor device with alignment key for metal contact mask KR0172467B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940014491A KR0172467B1 (en) 1994-06-23 1994-06-23 Fabrication method of semiconductor device with alignment key for metal contact mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940014491A KR0172467B1 (en) 1994-06-23 1994-06-23 Fabrication method of semiconductor device with alignment key for metal contact mask

Publications (2)

Publication Number Publication Date
KR960002569A true KR960002569A (en) 1996-01-26
KR0172467B1 KR0172467B1 (en) 1999-03-30

Family

ID=19386128

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940014491A KR0172467B1 (en) 1994-06-23 1994-06-23 Fabrication method of semiconductor device with alignment key for metal contact mask

Country Status (1)

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KR (1) KR0172467B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180036879A (en) 2016-09-30 2018-04-10 삼성전자주식회사 Semiconductor device including align key

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Publication number Publication date
KR0172467B1 (en) 1999-03-30

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