KR960026234A - Tungsten-Plug Formation Method of Semiconductor Device - Google Patents

Tungsten-Plug Formation Method of Semiconductor Device Download PDF

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Publication number
KR960026234A
KR960026234A KR1019940039470A KR19940039470A KR960026234A KR 960026234 A KR960026234 A KR 960026234A KR 1019940039470 A KR1019940039470 A KR 1019940039470A KR 19940039470 A KR19940039470 A KR 19940039470A KR 960026234 A KR960026234 A KR 960026234A
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South Korea
Prior art keywords
tungsten
plug
metal layer
lower metal
etching
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KR1019940039470A
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Korean (ko)
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KR0168120B1 (en
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고창진
이주일
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019940039470A priority Critical patent/KR0168120B1/en
Publication of KR960026234A publication Critical patent/KR960026234A/en
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Publication of KR0168120B1 publication Critical patent/KR0168120B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 텅스텐-플러그 형성방법에 관한 것으로, 텅스텐(W)을 증착하고 식각한 후 노출된 하부금속층의 상부에 잔류되는 텅스텐 잔유물을 제거하기 위한 식각동정시 발생되는 텅스텐-플러그의 식각피해를 방지하기 위하여 텅스텐 잔유물 제거시 텅스텐-플러그 상부에 감광막패턴을 형성시키고 하부금속층과의 식각선택비가 큰식각용액을 사용하여 습식식각하므로써 텅스텐-플러그 표면의 손실이 방지되고 평탄성 향상에 따른 상부 금속층과의 전기적 접속특성의 향상으로 소자의 수율이 증대될 수 있도록 한 반도체 소자의 텅스텐-플러그 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a tungsten-plug of a semiconductor device, wherein the tungsten-plug is etched during etching to remove tungsten residues remaining on the exposed lower metal layer after depositing and etching tungsten (W). In order to prevent damages, the photoresist pattern is formed on the top of the tungsten plug to remove the tungsten residue, and the wet metal is wet-etched using an etching solution having a large etching selectivity with the lower metal layer, thereby preventing the loss of the surface of the tungsten plug and increasing the flatness of the upper metal layer. The present invention relates to a method for forming a tungsten-plug of a semiconductor device in which the yield of the device can be increased by improving the electrical connection characteristics thereof.

Description

반도체 소자의 텅스텐-플러그 형성방법.Tungsten-Plug Formation Method of Semiconductor Device.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도는 내지 제2C도는 본 발명에 따른 반도체 소자의 텅스텐-플러그 형성방법을 설명하기 위한 소자의 단면도.2A to 2C are cross-sectional views of a device for explaining a tungsten-plug forming method of a semiconductor device according to the present invention.

Claims (4)

반도체 소자의 텅스텐-플러그 형성방법에 있어서, 접합부가 형성된 실리콘기판상에 절연막을 형성하고 상기 접합부의 표면이 노출되도록 상기 절연막을 식각하여 콘택홀을 형성한 후 전체면에 소정두께의 하부금속층을 형성시키는 단계와, 상기 단계로부터 전체면에 텅스텐(W)을 증착하고 전면식각하여 상기 콘택홀 내부에 텅스텐-플러그를 형성시키는 단계와, 상기 단계로부터 상기 텅스텐-플러그의 노출된 부분에 감광막 패턴을 형성시키는 단계와, 상기 단계로부터 노출된 하부금속층 상부에 잔류되는 텅스텐 잔유물을 제거시킨 후 상기 감광막패턴을 제거시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 텅스텐-플러그 형성방법.In the method of forming a tungsten-plug of a semiconductor device, an insulating film is formed on a silicon substrate on which a junction is formed, a contact hole is formed by etching the insulating layer so that the surface of the junction is exposed, and a lower metal layer having a predetermined thickness is formed on the entire surface. Forming a tungsten-plug inside the contact hole by depositing tungsten (W) on the entire surface and etching the surface from the step; and forming a photoresist pattern on the exposed portion of the tungsten-plug from the step. And removing the photoresist pattern after removing the tungsten residue remaining on the lower metal layer exposed from the step. 제1항에 있어서, 상기 하부금속층은 티타늄(Ti)과 티타늄나이트라이드(TiN)가 순차적으로 증착된 것을 특징으로 하는 반도체 소자의 텅스텐-플러그 형성방법.The method of claim 1, wherein the lower metal layer is formed by sequentially depositing titanium (Ti) and titanium nitride (TiN). 제1항에 있어서, 상기 하부금속층은 텅스텐-플러그 형성을 위한 삭각공정시 식각정지점으로 이용되는 것을 특징으로 하는 반도체 소자의 텅스텐-플러그 형성방법.The method of claim 1, wherein the lower metal layer is used as an etch stop point during a cutting process for forming tungsten-plug. 제1항에 있어서, 상기 텅스텐 잔유물은 상기 하부금속층과의 삭각선택비가 큰 식각용액을 사용한 습식식각으로 제거되는 것을 특징으로 하는 반도체 소자의 텅스텐-플러그 형성방법.The method of claim 1, wherein the tungsten residue is removed by wet etching using an etching solution having a large selection ratio with the lower metal layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039470A 1994-12-30 1994-12-30 Forming method of tungsten plug KR0168120B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940039470A KR0168120B1 (en) 1994-12-30 1994-12-30 Forming method of tungsten plug

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940039470A KR0168120B1 (en) 1994-12-30 1994-12-30 Forming method of tungsten plug

Publications (2)

Publication Number Publication Date
KR960026234A true KR960026234A (en) 1996-07-22
KR0168120B1 KR0168120B1 (en) 1999-02-01

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KR1019940039470A KR0168120B1 (en) 1994-12-30 1994-12-30 Forming method of tungsten plug

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000035543A (en) * 1998-11-19 2000-06-26 이데이 노부유끼 Semiconductor device and its manufacturing method
KR100763711B1 (en) * 2002-09-04 2007-10-04 동부일렉트로닉스 주식회사 Method for forming metal line of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000035543A (en) * 1998-11-19 2000-06-26 이데이 노부유끼 Semiconductor device and its manufacturing method
KR100763711B1 (en) * 2002-09-04 2007-10-04 동부일렉트로닉스 주식회사 Method for forming metal line of semiconductor device

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Publication number Publication date
KR0168120B1 (en) 1999-02-01

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