KR960002526A - 성막방법 - Google Patents

성막방법 Download PDF

Info

Publication number
KR960002526A
KR960002526A KR1019950016167A KR19950016167A KR960002526A KR 960002526 A KR960002526 A KR 960002526A KR 1019950016167 A KR1019950016167 A KR 1019950016167A KR 19950016167 A KR19950016167 A KR 19950016167A KR 960002526 A KR960002526 A KR 960002526A
Authority
KR
South Korea
Prior art keywords
gas
resistance value
film
polysilicon film
refiner
Prior art date
Application number
KR1019950016167A
Other languages
English (en)
Other versions
KR100413914B1 (ko
Inventor
세이이치 시시구치
가즈히데 하세베
노부아키 시게마츠
Original Assignee
이노우에 아키라
도쿄 일렉트론 가부시키가이샤
마츠바 구니유키
도쿄 일렉트론 도호쿠 가부시키가이샤
가네코 히사시
니혼덴키 가부시키이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이노우에 아키라, 도쿄 일렉트론 가부시키가이샤, 마츠바 구니유키, 도쿄 일렉트론 도호쿠 가부시키가이샤, 가네코 히사시, 니혼덴키 가부시키이샤 filed Critical 이노우에 아키라
Publication of KR960002526A publication Critical patent/KR960002526A/ko
Application granted granted Critical
Publication of KR100413914B1 publication Critical patent/KR100413914B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3215Doping the layers
    • H01L21/32155Doping polycristalline - or amorphous silicon layers

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

웨이퍼의 다수는 웨이퍼보트상의 반응관 내에 적재되고; 모노실란 가스, 포스핀 가스 및 N2O가스는 인을 도핑한 아몰파스 실리콘막을 형성하고; 다음에 웨이퍼를 예컨대, 폴리크리스탈화 아몰파스 실리콘막으로 다른 반응관 내에 어닐한다. N2O의 분해에 의해 생성된 OS(산소)는 막 내로 주입된다. OS는 실리콘 결정의 핵으로 되고, 결정이 미소화되어 크기가 균일하게 된다. 결과적으로 폴리실리콘막 미세화장치의 저항치의 높은 균일성을 얻을 수 있게 된다. 폴리실리콘막의 저항치는 산소의 첨가에 의해 쉽게 제어될 수 있다. 결과적으로 폴리실리콘막 미세화장치의 저항치의 높은 균일성을 얻을 수 있게 된다.

Description

성막방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 성막방법을 실시하기 위해 이용되는 성막장치의 일예를 나타낸 단면도.

Claims (4)

  1. 밀폐가 유지되는 반응로에서 처리되는 물체를 적재하는 단계와, 화학적 기체반응에 의해 처리되는 물체상에 실리콘막을 형성하기 위해 반응로에 가스를 형성 및 가스를 도핑하는 막을 공급하는 단계 및, 계속해서 막형성처리를 통해 반응로로의 실리콘 결정의 증가를 방지하기 위한 구성요소를 갖는 가스를 공급하는 단계를 갖춘 것을 특징으로 하는 성막방법.
  2. 제1항에 있어서, 실리콘 결정의 증가를 방지하기 위한 구성요소를 갖는 가스로는 N2O, O2, O3및 CO2중 하나가 선택되는 것을 특징으로 하는 성막방법.
  3. 제1항에 있어서, 막형성가스는 모노실란(SiH4)가스인 것을 특징으로 하는 성막방법.
  4. 제1항에 있어서, 도핑가스는 포스핀(PH3) 또는 B2H2인 것을 특징으로 하는 성막방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950016167A 1994-06-17 1995-06-17 성막방법 KR100413914B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP94-159532 1994-06-17
JP15953294A JP3432601B2 (ja) 1994-06-17 1994-06-17 成膜方法

Publications (2)

Publication Number Publication Date
KR960002526A true KR960002526A (ko) 1996-01-26
KR100413914B1 KR100413914B1 (ko) 2004-03-30

Family

ID=15695832

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950016167A KR100413914B1 (ko) 1994-06-17 1995-06-17 성막방법

Country Status (4)

Country Link
US (1) US5783257A (ko)
JP (1) JP3432601B2 (ko)
KR (1) KR100413914B1 (ko)
TW (1) TW271504B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101012103B1 (ko) * 2008-05-02 2011-02-07 주식회사 유진테크 극미세 결정립 폴리 실리콘 박막 증착 방법

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11260734A (ja) 1998-03-12 1999-09-24 Nec Corp 半導体装置の製造方法
JPH11288893A (ja) * 1998-04-03 1999-10-19 Nec Corp 半導体製造装置及び半導体装置の製造方法
JP2000114250A (ja) * 1998-08-21 2000-04-21 Texas Instr Inc <Ti> 枚葉式反応器を使用した、インサイチュ・ド―ピングされたきめの粗い多結晶シリコンの製法
US6615615B2 (en) 2001-06-29 2003-09-09 Lightwave Microsystems Corporation GePSG core for a planar lightwave circuit
JP5311791B2 (ja) * 2007-10-12 2013-10-09 東京エレクトロン株式会社 ポリシリコン膜の形成方法
KR101012102B1 (ko) * 2008-05-02 2011-02-07 주식회사 유진테크 극미세 결정립 폴리 실리콘 박막 증착 방법
US8304033B2 (en) * 2009-02-04 2012-11-06 Tel Epion Inc. Method of irradiating substrate with gas cluster ion beam formed from multiple gas nozzles
WO2014002353A1 (ja) * 2012-06-27 2014-01-03 パナソニック株式会社 固体撮像素子及びその製造方法
JP7190875B2 (ja) * 2018-11-16 2022-12-16 東京エレクトロン株式会社 ポリシリコン膜の形成方法及び成膜装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor
JPS6035746A (ja) * 1984-06-13 1985-02-23 Matsushita Electric Ind Co Ltd 電子写真感光体
JPH01268047A (ja) * 1988-04-19 1989-10-25 Nec Corp ポリシリコン抵抗の形成方法
KR920006197B1 (ko) * 1988-11-26 1992-08-01 삼성전자 주식회사 비정질 실리콘 태양전지
JPH0376022A (ja) * 1989-08-18 1991-04-02 Konica Corp 磁気記録媒体
US5080933A (en) * 1990-09-04 1992-01-14 Motorola, Inc. Selective deposition of polycrystalline silicon
JPH053258A (ja) * 1990-09-25 1993-01-08 Kawasaki Steel Corp 層間絶縁膜の形成方法
JPH04151839A (ja) * 1990-10-16 1992-05-25 Kawasaki Steel Corp シリコンオキシナイトライド膜の製造方法
US5159205A (en) * 1990-10-24 1992-10-27 Burr-Brown Corporation Timing generator circuit including adjustable tapped delay line within phase lock loop to control timing of signals in the tapped delay line
JPH06140324A (ja) * 1992-10-23 1994-05-20 Casio Comput Co Ltd 半導体薄膜の結晶化方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101012103B1 (ko) * 2008-05-02 2011-02-07 주식회사 유진테크 극미세 결정립 폴리 실리콘 박막 증착 방법

Also Published As

Publication number Publication date
US5783257A (en) 1998-07-21
JP3432601B2 (ja) 2003-08-04
JPH088195A (ja) 1996-01-12
KR100413914B1 (ko) 2004-03-30
TW271504B (ko) 1996-03-01

Similar Documents

Publication Publication Date Title
IE914500A1 (en) Process for producing a smooth, polycrystalline silicon¹layer doped with arsenic for highly integrated circuits
KR960002526A (ko) 성막방법
KR970013387A (ko) 박막트랜지스터의 제조방법
US3635771A (en) Method of depositing semiconductor material
KR920008876A (ko) Cvd실리콘 산화질화막의 제조방법
KR830006827A (ko) 실리콘 함유층의 제조공정
CN102017085B (zh) 用于沉积超细晶粒多晶硅薄膜的方法
CN102017086B (zh) 用于沉积具有超细晶粒的多晶硅薄膜的方法
JP3706811B2 (ja) 半導体装置の製造方法、基板処理方法、及び半導体製造装置
JPH02248038A (ja) 多結晶質半導体物質層の製造方法
JPS6249981B2 (ko)
KR970052100A (ko) 반도체 장치 제작에서의 도펀트 활성화 방법
JPS6223451B2 (ko)
Shimizu Reactions on substrate for preparation of silicon-networks from precursors, SiFnHm (n+ m< 3)
JPS62128531A (ja) シリコン基板およびその製造方法
JPS5841785B2 (ja) 半導体装置
KR100368318B1 (ko) 반도체 소자의 선택적 에피택셜 성장법
KR950027998A (ko) 반도체 소자의 필드 산화막 형성방법
JPS5591815A (en) Silicon epitaxial growth
KR960040116A (ko) 보론이 도우프된 다결정실리콘 형성장치 및 그 방법
JPS5683025A (en) Formation of single crystal semiconductor film
JPS5799725A (en) Manufacture of amorphous semiconductor film
JPS5643735A (en) Manufacture of semiconductor device
JPS5690528A (en) Surface treatment of semiconductor device
JPH02151026A (ja) シリコン半導体ウエハの製造方法

Legal Events

Date Code Title Description
N231 Notification of change of applicant
A201 Request for examination
E902 Notification of reason for refusal
N231 Notification of change of applicant
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20121130

Year of fee payment: 10

FPAY Annual fee payment

Payment date: 20131210

Year of fee payment: 11

FPAY Annual fee payment

Payment date: 20141205

Year of fee payment: 12

EXPY Expiration of term