KR950024625A - 플립 칩 캐리어 모듈의 표면 실장 공정 - Google Patents

플립 칩 캐리어 모듈의 표면 실장 공정 Download PDF

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Publication number
KR950024625A
KR950024625A KR1019950000161A KR19950000161A KR950024625A KR 950024625 A KR950024625 A KR 950024625A KR 1019950000161 A KR1019950000161 A KR 1019950000161A KR 19950000161 A KR19950000161 A KR 19950000161A KR 950024625 A KR950024625 A KR 950024625A
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South Korea
Prior art keywords
chip
substrate
chip carrier
flip
amoeba
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KR1019950000161A
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English (en)
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KR0156065B1 (ko
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헤롤드 화이트 로렌스
Original Assignee
윌리엄 티. 엘리스
인터내셔널 비지네스 머신즈 코포레이션
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Publication of KR950024625A publication Critical patent/KR950024625A/ko
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Publication of KR0156065B1 publication Critical patent/KR0156065B1/ko

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

본 발명은 캡술제와 칩 기판 간에 및/또는 캡슐제와 칩 캐리어 기판 표면 간의 경계를 따른 플립-칩 C4 접합부 사이에 아메바와 같은 솔더 브리지가 형성하는 것을 방지하기 위해 표면 실장 캡술화된 플립-칩 캐리어 모듈을 취급하고 보관하기 위한 공정에 관한 것이다. 상기 캠슐제의 자유로운 수분 농도는 회로 기판에 상기 모듈을 실장하는 데 사용된 리플로우 열처리 동안 선정된 안전한 한계값 미만으로 유지된다.

Description

플립 칩 캐리어 모듈의 표면 실장 공정
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 아메바(amoebas)를 방지하기 위해 칩 캐리어(chip carriers)를 취급하고/보관하기 위한 본 발명에 따른 공정의 실시도.
제2도는 상호접합 구조를 만들기 위한 본 발명에 따른 공정의 다른 실시도.
제3도는 본 발명의 정보 처리 시스템을 제조하기 위한 공정도.

Claims (20)

  1. 표면 실장, 플립-칩 기판을 취급하고 보관하는 공정(A process for handling and storing surface-mount,flip-chip substrates)에 있어서, 칩 캐리어 기판(chip carrier substrate)을 제조하는 단계, 상기 기판으로부터 칩을 체적 만큼(by a voIume)분리하는 솔더 접합부(solder connections)를 사용하여 상기 칩 캐리어 기판에 플립 칩(flip chip)을 직접 접합시키는 단계, 및 리플로우 솔더링 동안(during the reflow soldering) 아메바(amoebas)를 형성하게 되는 분위기 기압으로부터의 충분한 수분이 캡슐내로 확산하는 것을 방지함으로써 후속하는 표면-실장, 솔더 리플로우 접합 동안 아메바의 형성을 방지하는 단계를 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관공정.
  2. 상호접합 어셈블리를 제조하는 공정(A process for manufacturing an interconnect assembly)에 있어서, 칩 캐리어 기판을 제조하는 단계, 상기 기판으로부터 칩을 체적만큼 분리하는 솔더 접합부를 사용하여 상기 칩캐리어 기판에 플립 칩을 직접 접합시키는 단계, 상기 솔더 접합부를 보호하기 위해 유기 재료(organic material)로서 상기 플립 칩과 상기 캐리어 기판 간의 상기 체적을 캡슐화시키는 단계, 상기 칩 캐리어를 표면 실장 접합하기 위해 회로 기판에 표면 접촉부의 어레이(an array of surface contacts)를 제공하는 단계, 상기 회로 기판의 표면 접촉부에 상기 칩 캐리어 기판을 리플로우 솔더링(reflow soldering)하는 단계, 및 리플로우 솔더링 동안(during the reflow soldering) 아메바(amoebas)를 형성하게 되는 분위기 기압으로부터의 충분한 습도가 캡슐제속으로 확산하는 것을 방지함으로써 후속하는 기판-실장, 리플로우 솔더링 동안 아메바의 형성을 방지하는 단계를 포함하는 것을 특징으로하는 상호접합 어셈블리의 제조 공정.
  3. 정보 처리 시스템을 제조하는 공정(A process for manufacturing information handling system)에 있어서, 칩 캐리어 기판을 제조하는 단계, 상기 기판으로부터 칩을 체적만큼 분리하는 솔더 접합부를 사용하여 상기 칩 캐리어 기관에 플립 칩을 직접 접합시키는 단계, 상기 솔더 접합부를 보호하기 위해 유기 재료로서 상기 플립 칩과 상기 캐리어 기판 간의 상기 체적을 캡슐화시키는 단계, 상기 칩 캐리어를 표면 실장 접합하기 위해 회로 기판에 표면 접촉부의 어레이를 제공하는 단계, 상기 회로 기판의 표면 접촉부에 상기 칩 캐리어 기판을 리플로우 솔더링하는 단계, 리플로우 솔더링 동안 아메바를 형성하게 되는 충분한 수분이 캡슐제내로 확산하는 것을 방지함으로써 아메바의 형성을 방지하는 단계, 봉입부(an enc1osure)에 상기 회로 기판을 실장하는 단계, 컴퓨터 주변장치와 통신하기 위한 신호 I/O 수단을 상기 회로 기판에 접합시키는 단계, 및 전원 공급 수단을 상기 회로 기관에 접합시키는 단계를 포함하는 것을 특징으로 하는 정보 처리 시스템의 제조 공정.
  4. 제1항에 있어서, 상기 아메바의 형성을 방지하는 단계는 리플로우 이전에 상승된 온도에서 상기 칩 캐리어를 보관하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  5. 제4항에 있어서, 상기 상승된 온도는 적어도 약 40℃인 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  6. 제1항에 있어서. 상기 아메바의 형성을 방지하는 단계는 리플로우 이전에 밀봉되어 거의 공기가 희박한 백(a sealed approximately air tight bag)에 상기 칩 캐리어를 보관하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  7. 제6항에 있어서, 상기 밀봉된 백은 또한 건조제(desiccant)를 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  8. 제1항에 있어서, 상기 아메바의 형성을 방지하는 단계는 적어도 약 12시간 동안 적어도 약 100℃의 온도에서 상기 칩 캐리어를 소결하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  9. 제8항에 있어서, 상기 칩 캐리어는 약 24시간 동안 약 125℃의 온도에서 소결되는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  10. 제1항에 있어서, 상기 아메바의 형성을 방지하는 단계는 제조 후 일주일 이상 동안 상기 칩이 분위기 기압에 노출되기 전에 상기 회로 기판에 상기 칩 캐리어를 리플로우 솔더링하거나 또는 상승된 온도에서 소결하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  11. 제1항에 있어서, 상기 캐리어 기판의 제조는 세라믹 재료층을 제조하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  12. 제1항에 있어서. 상기 캐리어 기판의 제조는 가요성 폴리이미드 및 동 포일층을 도포(laminating flexible layers of polyimide and copper foil)하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  13. 제1항에 있어서, 상기 캐리어 기판의 제조는 섬유로 보강된 단단한 유기 재료 기판(a rigid board of organic materlal)을 형성하는 것을 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  14. 제13항에 있어서, 상기 섬유는 유리섬유(fiberglass)를 포함하는 것을 특징으로 하는 표면 실장, 플립-칩 기판의 취급 및 보관 공정.
  15. 제2항에 있어서. 상기 아메바의 형성을 방지하는 단계는 리플로우 이전에 밀봉되어 거의 공기가 희박한 백(a sealed approximately air tight bag)에 상기 칩 캐리어를 보관하는 것을 포함하는 것을 특징으로 하는 상호접합 어셈블리의 제조 공정.
  16. 제15항에 있어서, 상기 밀봉된 백은 또한 건조제(desiccant)를 포함하는 것을 특징으로 하는 상호접합 어셈블리의 제조 공정.
  17. 제2항에 있어서, 상기 아메바의 형성을 방지하는 단계는 적어도 약 12시간 동안 적어도 약 100℃의 온도에서 상기 칩 캐리어를 소결하는 것을 포함하는 것을 특징으로 하는 상호접합 어셈블리의 제조 공정.
  18. 제17항에 있어서, 상기 칩 캐리어는 약 24시간 동안 약 125℃의 온도에서 소결되는 것을 특징으로 하는 상호접합 어셈블리의 제조 공정.
  19. 제3항에 있어서, 상기 아메바의 형성을 방지하는 단계는 리플로우 이전에 밀봉되어 거의 공기가 희박한 백(a sealed approximately air tight bag)에 상기 칩 캐리어를 보관하는 것을 포함하는 것을 특징으로 하는 정보 처리 시스템의 제조 공정.
  20. 제2항에 있어서, 상기 아메바의 형성을 방지하는 단계는 습도 상태에의 노출에 따라 상기 상호접합 구조를 소결하는 것을 포함하는 것을 특징으로 하는 상호접합 어셈블리의 제조 공정.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950000161A 1994-01-07 1995-01-06 플립 칩 캐리어 모듈의 표면 실장 공정 KR0156065B1 (ko)

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US8/178,994 1994-01-07
US08/178,994 US5473814A (en) 1994-01-07 1994-01-07 Process for surface mounting flip chip carrier modules

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KR950024625A true KR950024625A (ko) 1995-08-21
KR0156065B1 KR0156065B1 (ko) 1998-12-15

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CN1125356A (zh) 1996-06-26
TW255983B (en) 1995-09-01
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CN1137505C (zh) 2004-02-04
KR0156065B1 (ko) 1998-12-15
US5473814A (en) 1995-12-12

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