KR950001940A - 반도체 소자의 패턴형성용 마스크 제조방법 - Google Patents

반도체 소자의 패턴형성용 마스크 제조방법 Download PDF

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Publication number
KR950001940A
KR950001940A KR1019930010486A KR930010486A KR950001940A KR 950001940 A KR950001940 A KR 950001940A KR 1019930010486 A KR1019930010486 A KR 1019930010486A KR 930010486 A KR930010486 A KR 930010486A KR 950001940 A KR950001940 A KR 950001940A
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KR
South Korea
Prior art keywords
semiconductor device
quartz glass
forming
mask
pattern
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Application number
KR1019930010486A
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English (en)
Other versions
KR960015792B1 (ko
Inventor
배상만
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930010486A priority Critical patent/KR960015792B1/ko
Priority to JP12605994A priority patent/JP2704938B2/ja
Priority to US08/257,252 priority patent/US5449578A/en
Priority to DE4420417A priority patent/DE4420417C2/de
Publication of KR950001940A publication Critical patent/KR950001940A/ko
Application granted granted Critical
Publication of KR960015792B1 publication Critical patent/KR960015792B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/50—Mask blanks not covered by G03F1/20 - G03F1/34; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/7055—Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption
    • G03F7/70583—Speckle reduction, e.g. coherence control or amplitude/wavefront splitting

Abstract

본 발명은 반도체 소자의 제조공정중 광학적 리소그래피(Optical Lithography) 공정에 사용하기 위한 반도체 소자의 패턴형성용 마스크 제조방법에 관한 것으로, 크롬패턴에 의한 광 흡수 및 반사광에너지를 웨이퍼상의 이미지 형성 에너지로 이용하도록 석영유리와 크롬 사이에 반사강도가 높은 물질을 도포하고, 광의 정재파 효과를 이용하여 석영유리의 두께를 조절하여, 반도체 소자의 미세패턴 형성시 마스크에 조밀하게 형성된 패턴의 광 통과부분에 노광에너지를 증대시킬 수 있는 마스크 제조방법을 기술한 것이다.

Description

반도체 소자의 패턴형성용 마스크 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 내지 제2D도는 본 발명에 의한 반도체 소자의 패턴형성용 마스크를 제조하는 단계를 나타낸 단면도.

Claims (4)

  1. 반도체 소자의 패턴형성용 마스크 제조방법에 있어서, 소정의 두께를 갖는 석영유리(21) 상부에 반사막(23) 및 크롬(22)을 적층 형성하는 단계와, 상기 크롬(22)상에 감광막(24)을 도포한 다음, 상기 감광막(24)을 패턴화하는 단계와, 상기 패턴화된 감광막(24)을 이용하여 크롬(22) 및 반사막(23)을 차례로 식각하는 단계와, 상기 단계로부터 석영유리(21)의 노출된 부분을 소정의 깊이로 식각하고, 상기 감광막(24)을 제거하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 패턴형성용 마스크 제조방법.
  2. 제1항에 있어서, 상기 반사막(23)은 A1, Ag인 것을 특징으로 하는 반도체 소자의 패턴형성용 마스크 제조방법.
  3. 제1항에 있어서, 상기 석영유리(21)의 두께는, 반사막(23)과 경계면(30) 사이의 석영유리(21) 두께 d가 정재파에서 파형의 골부분이 되는 조건 d·Sinθ=1/4·(2n-1)·λ가 되도독 하고, 반사막(23)이 없는 빛이 투과되는 지역의 석영유리(21) 두께 d´가 정재파에서 파형의 마루부분이 되는 조건 d´·Sinθ=1/4·(2n-1)·λ(단, 상기 n은 양의 정수이고, θ는 반사광의 각도이다.)가 되도록 형성하는 것을 특징으로 하는 반도체 소자의 패턴형성용 마스크 제조방법.
  4. 제1항에 있어서, 감광막상에 노광에너지를 증대시키기 위하여 상기 반사막(23)을 제거한 상태에서 상기 석영유리(21)의 두께를 조절하는 것을 특징으로 하는 반도체 소자의 패턴형성용 마스크 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930010486A 1993-06-10 1993-06-10 반도체 소자의 패턴형성용 마스크 제조방법 KR960015792B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019930010486A KR960015792B1 (ko) 1993-06-10 1993-06-10 반도체 소자의 패턴형성용 마스크 제조방법
JP12605994A JP2704938B2 (ja) 1993-06-10 1994-06-08 半導体素子のパターン形成用マスク製造方法
US08/257,252 US5449578A (en) 1993-06-10 1994-06-08 Method of manufacturing a mask for forming a pattern in a semiconductor device
DE4420417A DE4420417C2 (de) 1993-06-10 1994-06-10 Verfahren zur Herstellung einer Maske zur Erzeugung eines Musters auf einem Halbleiterbauelement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930010486A KR960015792B1 (ko) 1993-06-10 1993-06-10 반도체 소자의 패턴형성용 마스크 제조방법

Publications (2)

Publication Number Publication Date
KR950001940A true KR950001940A (ko) 1995-01-04
KR960015792B1 KR960015792B1 (ko) 1996-11-21

Family

ID=19357145

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930010486A KR960015792B1 (ko) 1993-06-10 1993-06-10 반도체 소자의 패턴형성용 마스크 제조방법

Country Status (4)

Country Link
US (1) US5449578A (ko)
JP (1) JP2704938B2 (ko)
KR (1) KR960015792B1 (ko)
DE (1) DE4420417C2 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6567013B1 (en) * 1998-08-13 2003-05-20 Halliburton Energy Services, Inc. Digital hydraulic well control system
US6232247B1 (en) * 1999-09-01 2001-05-15 Micron Technology, Inc. Substrate coating apparatus and semiconductor processing method of improving uniformity of liquid deposition
US6555276B2 (en) 1999-10-04 2003-04-29 Micron Technology, Inc. Substrate coating and semiconductor processing method of improving uniformity of liquid deposition
US6444372B1 (en) * 1999-10-25 2002-09-03 Svg Lithography Systems, Inc. Non absorbing reticle and method of making same
US9566718B2 (en) * 2013-10-07 2017-02-14 Techsouth, Inc. Saw guide
KR102286886B1 (ko) * 2014-11-18 2021-08-09 삼성디스플레이 주식회사 포토 마스크 및 이의 제조 방법
CN112180678A (zh) * 2020-11-13 2021-01-05 泉芯集成电路制造(济南)有限公司 一种光罩工艺误差修正方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5279911A (en) * 1990-07-23 1994-01-18 Mitsubishi Denki Kabushiki Kaisha Photomask
JPH0823686B2 (ja) * 1990-07-24 1996-03-06 凸版印刷株式会社 レーザーマスク

Also Published As

Publication number Publication date
JP2704938B2 (ja) 1998-01-26
DE4420417C2 (de) 2002-07-18
US5449578A (en) 1995-09-12
KR960015792B1 (ko) 1996-11-21
DE4420417A1 (de) 1994-12-15
JPH07146543A (ja) 1995-06-06

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