KR950001931A - 반도체 기판의 열처리 방법 - Google Patents
반도체 기판의 열처리 방법 Download PDFInfo
- Publication number
- KR950001931A KR950001931A KR1019940012939A KR19940012939A KR950001931A KR 950001931 A KR950001931 A KR 950001931A KR 1019940012939 A KR1019940012939 A KR 1019940012939A KR 19940012939 A KR19940012939 A KR 19940012939A KR 950001931 A KR950001931 A KR 950001931A
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- South Korea
- Prior art keywords
- semiconductor substrate
- heat treatment
- atmosphere
- temperature
- furnace
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67109—Apparatus for thermal treatment mainly by convection
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
본 발명은 1100℃ 이상의 고온의 환원성 또는 불활성의 분위기하에서 열처리를 행해도, 분위기를 질소개스로 바꾼 경우에 기판 표면에 질화막을 발생시키는 일 없이 기판 표면의 거칠기를 증개시키지 않도록 하고, 기판에 기인하는 산화막의 결함을 발생시키지 않도록 하는 반도체 기판의 처리 방법을 제공한다.
반도체 기판을 노중에 얹어놓고 1100℃ 이상의 온도의 환원성 또는 불활성의 분위기중에서 소정시간 열처리하고, 상기 분위기를 소정온도로 하강시킨 후 또는 상기 소정온도로 하강시키면서 상기 분위기를 질소개스로 바꾸고, 상기 반도체 기판을 다시 열처리하거나 또는 노에서 취출된 반도체 기판의 열처리 방법에 있어서, 상기 소정온도 약 600℃ 이상에서 약 850℃ 이하의 온도인 것을 특징으로 하는 반도체 기판의 열처리 방법.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 반도체 기판의 처리방법의 1실시예를 나타낸 공정도, 제2도는 종래의 반도체 기판의 처리방법을 나타낸 공정도, 제3도는 질화반응의 온도의존성을 나타낸 도면, 제4도는 열처리로(熱處理爐)의 개략적인 구성을 나타낸 단면도, 제5도는 청구항 2 에 따른 실시예 1 및 실시예 2 에 있어서의 RCA세정전의 웨이퍼(a)와 RCA세정 후의 웨이퍼(c) 및 종래예에 있어서의 RCA세정 전의 웨이퍼(b)와 RCA세정 후의 웨이퍼(d)를 나타티낸 도면.
Claims (2)
- 반도체 기판을 노(1;爐)중에 얹어놓고 1100℃ 이상의 온도의 환원성의 분위기중에서 소정시간 열처리하고, 상기 분위기를 소정온도 로 하강시킨 후 또는 상기 소정온도로 하강시키면서 상기 분위기를 질소개스로 바꾸고, 상기 반도체 기판을 다시 열처리하거나 또는 노(1;爐)에서 취출(取出)하는 반도체 기판의 열처리 방법에 있어서, 상기 소정온도가 약 600℃ 이상 약 850℃ 이하의 온도인 것을 특징으로 하는 반도체 기판의 열처리 방법.
- 반도체 기판을 노(1;爐)중에 얹어 놓고 1100℃ 이상의 온도의 환원성의 분위기중에서 소정시간 열처치한 후, 상기 분위기를 불황성의 분위기로 바꾸고 상기 반도체 기판을 다시 열처리하거나 또는 노(1;爐)에서 취출하는 것을 특징으로 하는 반도체 기판의 열처리 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP93-138536 | 1993-06-10 | ||
JP13853693A JP3292545B2 (ja) | 1993-06-10 | 1993-06-10 | 半導体基板の熱処理方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950001931A true KR950001931A (ko) | 1995-01-04 |
KR100194489B1 KR100194489B1 (ko) | 1999-06-15 |
Family
ID=15224453
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940012939A KR100194489B1 (ko) | 1993-06-10 | 1994-06-09 | 반도체기판의 열처리방법 |
Country Status (3)
Country | Link |
---|---|
EP (2) | EP0628994A3 (ko) |
JP (1) | JP3292545B2 (ko) |
KR (1) | KR100194489B1 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3407629B2 (ja) * | 1997-12-17 | 2003-05-19 | 信越半導体株式会社 | シリコン単結晶ウエーハの熱処理方法ならびにシリコン単結晶ウエーハ |
WO2000041227A1 (fr) | 1998-12-28 | 2000-07-13 | Shin-Etsu Handotai Co.,Ltd. | Procede de recuit thermique d'une plaquette de silicium, et plaquette de silicium |
DE19909564A1 (de) * | 1999-03-04 | 2001-01-04 | Siemens Ag | Verfahren zur Verbesserung thermischer Prozeßschritte |
JP3893608B2 (ja) | 2000-09-21 | 2007-03-14 | 信越半導体株式会社 | アニールウェーハの製造方法 |
DE102015200890A1 (de) * | 2015-01-21 | 2016-07-21 | Siltronic Ag | Epitaktisch beschichtete Halbleiterscheibe und Verfahren zur Herstellung einer epitaktisch beschichteten Halbleiterscheibe |
KR102478155B1 (ko) | 2020-11-30 | 2022-12-16 | 주식회사 코드리치 | 발판센서를 이용한 운동 및 놀이장치 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3855024A (en) * | 1971-11-01 | 1974-12-17 | Western Electric Co | Method of vapor-phase polishing a surface of a semiconductor |
US4149905A (en) * | 1977-12-27 | 1979-04-17 | Bell Telephone Laboratories, Incorporated | Method of limiting stacking faults in oxidized silicon wafers |
JPH01134932A (ja) * | 1987-11-19 | 1989-05-26 | Oki Electric Ind Co Ltd | 基板清浄化方法及び基板清浄化装置 |
US5264396A (en) * | 1993-01-14 | 1993-11-23 | Micron Semiconductor, Inc. | Method for enhancing nitridation and oxidation growth by introducing pulsed NF3 |
-
1993
- 1993-06-10 JP JP13853693A patent/JP3292545B2/ja not_active Expired - Fee Related
-
1994
- 1994-06-09 KR KR1019940012939A patent/KR100194489B1/ko not_active IP Right Cessation
- 1994-06-10 EP EP94108961A patent/EP0628994A3/en not_active Ceased
- 1994-06-10 EP EP97112237A patent/EP0807966A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JPH06349839A (ja) | 1994-12-22 |
EP0807966A1 (en) | 1997-11-19 |
KR100194489B1 (ko) | 1999-06-15 |
EP0628994A3 (en) | 1996-05-08 |
JP3292545B2 (ja) | 2002-06-17 |
EP0628994A2 (en) | 1994-12-14 |
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A201 | Request for examination | ||
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E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |