KR940002976A - 래티클과 그 래티클을 사용한 반도체 장치 및 그 제조방법 - Google Patents

래티클과 그 래티클을 사용한 반도체 장치 및 그 제조방법 Download PDF

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KR940002976A
KR940002976A KR1019930012246A KR930012246A KR940002976A KR 940002976 A KR940002976 A KR 940002976A KR 1019930012246 A KR1019930012246 A KR 1019930012246A KR 930012246 A KR930012246 A KR 930012246A KR 940002976 A KR940002976 A KR 940002976A
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insulating film
mark
reticle
metal layer
opening
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KR1019930012246A
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KR0136251B1 (ko
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마사아키 기누가와
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사또오 후미오
가부시기가이샤 도시바
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/708—Construction of apparatus, e.g. environment aspects, hygiene aspects or materials
    • G03F7/70858—Environment aspects, e.g. pressure of beam-path gas, temperature
    • G03F7/70866—Environment aspects, e.g. pressure of beam-path gas, temperature of mask or workpiece
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/708—Construction of apparatus, e.g. environment aspects, hygiene aspects or materials
    • G03F7/70908—Hygiene, e.g. preventing apparatus pollution, mitigating effect of pollution or removing pollutants from apparatus
    • G03F7/70916—Pollution mitigation, i.e. mitigating effect of contamination or debris, e.g. foil traps
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/975—Substrate or mask aligning feature

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  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Atmospheric Sciences (AREA)
  • Public Health (AREA)
  • Epidemiology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Environmental & Geological Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Toxicology (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

본 발명은 래티클 검사용 막의 웨이퍼상 전사물에서 더스트가 발생하는 것을 방지하고 LSI의 수율을 향상시킨다.
실리콘 기판(41)의 표면상에 제1절연막(42)을 설치하고, 이 절연막(42)상에 제1실리사이드 배선층(43)을 퇴적시킨다. 상기 실리사이드 배선층(43)을 제1래티클(20)을 사용하여 패터닝함으로써 제1마크(34)를 형성한다.
이 마크(34) 및 절연막(42)상에 제2절연막(44)을 퇴적시키고, 이 절연막(44)을 제2래티클(25)을 사용하여 패터닝함으로써 상기 마크(34)상에 위치하는 제2마크(35)를 형성한다. 이 마크(35)안 및 제2절연막(44)상에 제2실리사이드 배선통(46)을 퇴적시키고, 이 실리사이드 배선통 (46)을 제3래티클(27)을 사용하여 패터닝함으로써 더스트 방지용의 퇴적물(37) 및 제3마크(36)를 형성한다. 따라서 LSI의 수율을 향상시킬 수 있다.

Description

래티클과 그 래티클을 사용한 반도체 장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명 실시예의 제5도에 도시한 1-1선에 따른 확대 단면도,
제2도는 본 발명의 실시예에 대한 제1래티클을 도시하는 평면도,
제3도는 본 발명의 실시예에 의한 제2래티클을 도시하는 평면도,
제4도는 본 발명의 실시예에 의한 제3래티클을 도시하는 평면도.

Claims (3)

  1. 기판과, 웨이퍼상의 절연막에 설치된 제1검사용 마크의 전사물인 개구부에 의하여 노출하고 있는 제1금속층을 덮기 위하여, 상기 개구부 안 및 상기 절연막 상에 제2금속층을 설치하기 위하여 상기 기판을 표면상에 형성된 패턴 형성막(28)과, 상기 패턴 헝성막에서 떨어진 위치에 설치되고, 상기 기판의 표면상에 형성된 제2검사용 마크(29)를 구비하는 것을 특징으로 하는 래티클.
  2. 제1절연막(42)과, 상기 제1절연막 상에 퇴적된 제1금속층을 제1래티클을 사용하여 에칭함으로써 형성된 제1마크(34)와, 상기 제1절연막 및 상기 제1마크상에 퇴적된 제2절연막(44)을, 제2래티클을 사용하여 에칭함으로써 형성된 상기 제1마크 상에 위치하는 제2마크(35)로서의 개구부(45)와, 상기 개구부 안 및 상기 제2절연막상에 퇴적한 제2금속층(46)을 제3래티클을 사용하여 에칭함으로써, 상기 개구부내에 형성된 상기 제1마크를 모두 덮기 위한 퇴적물(37)과, 상기 퇴적물에서 떨어진 위치에 형성된 제3마크(36)를 구비하는 것을 특징으로 하는 래티클을 사용한 반도체 장치.
  3. 제1절연막상에 제1금속층을 퇴적하는 공정과, 상기 제1금속층을 제1레티클을 사용하여 에칭함으로써 제1마크를 형성하는 공정과 상기 제1절연막 및 상기 제1마크상에 제2절연막을 퇴적하는 공정과, 상기 제2절연막을 제2래티클을 사용하여 에칭함으로써 상기 제1마크상에 위치하는 제2마크로서의 개구부를 형성하는 공정과, 상기 개구부 안 및 상기 제2절연막상에 제2금속층을 퇴적하는 공정과, 상기 제2금속층을 제3래티클을 사용하여 에칭함으로써 상기 개구부안에 위치하는 상기 제1마크를 모두 덮기 위한 퇴적물 및 상기 퇴적물에서 떨어진 위치에 제3마크를 형성하는 공정으로 이루어지는 것을 특징으로 하는 래티클을 사용한 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930012246A 1992-07-02 1993-07-01 래티클과 그 래티클을 사용한 반도체 장치 및 그 제조 방법 KR0136251B1 (ko)

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Application Number Priority Date Filing Date Title
JP17551592A JP3115107B2 (ja) 1992-07-02 1992-07-02 レチクルとそのレチクルを用いた半導体装置およびその製造方法
JP92-175515 1992-07-02

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KR940002976A true KR940002976A (ko) 1994-02-19
KR0136251B1 KR0136251B1 (ko) 1998-04-29

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Publication number Priority date Publication date Assignee Title
JPH10177245A (ja) * 1996-12-18 1998-06-30 Fujitsu Ltd レチクル、半導体基板及び半導体チップ
US5898227A (en) * 1997-02-18 1999-04-27 International Business Machines Corporation Alignment targets having enhanced contrast
US7115523B2 (en) * 2000-05-22 2006-10-03 Applied Materials, Inc. Method and apparatus for etching photomasks
JP4703364B2 (ja) * 2005-10-24 2011-06-15 株式会社東芝 半導体装置及びその製造方法
KR100790250B1 (ko) * 2006-08-09 2008-01-02 동부일렉트로닉스 주식회사 정렬 키 어셈블리 및 이의 제조 방법

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JPS6224260A (ja) * 1985-07-25 1987-02-02 Hoya Corp パタ−ン形成方法
JP2952887B2 (ja) * 1989-05-20 1999-09-27 富士通株式会社 半導体装置およびその製造方法
US4992394A (en) * 1989-07-31 1991-02-12 At&T Bell Laboratories Self aligned registration marks for integrated circuit fabrication
US5250468A (en) * 1990-02-05 1993-10-05 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device including interlaying insulating film

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KR0136251B1 (ko) 1998-04-29
US5665645A (en) 1997-09-09
JPH0619120A (ja) 1994-01-28

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