KR940001434A - 화상용 메모리 장치 - Google Patents

화상용 메모리 장치 Download PDF

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Publication number
KR940001434A
KR940001434A KR1019930010491A KR930010491A KR940001434A KR 940001434 A KR940001434 A KR 940001434A KR 1019930010491 A KR1019930010491 A KR 1019930010491A KR 930010491 A KR930010491 A KR 930010491A KR 940001434 A KR940001434 A KR 940001434A
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KR
South Korea
Prior art keywords
serial input
memory array
still image
holding mode
memory device
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Application number
KR1019930010491A
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English (en)
Other versions
KR100282313B1 (ko
Inventor
마사따까 와까마쯔
Original Assignee
오오가 노리오
소니 가부시끼가이샤
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Application filed by 오오가 노리오, 소니 가부시끼가이샤 filed Critical 오오가 노리오
Publication of KR940001434A publication Critical patent/KR940001434A/ko
Application granted granted Critical
Publication of KR100282313B1 publication Critical patent/KR100282313B1/ko

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/60Memory management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/13Digital output to plotter ; Cooperation and interconnection of the plotter with other functional units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/147Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1036Read-write modes for single port memories, i.e. having either a random port or a serial port using data shift registers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/32358Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device using picture signal storage, e.g. at transmitter
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/32358Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device using picture signal storage, e.g. at transmitter
    • H04N1/32443Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device using picture signal storage, e.g. at transmitter with asynchronous operation of the image input and output devices connected to the memory
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/907Television signal recording using static stores, e.g. storage tubes or semiconductor memories
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/12Frame memory handling
    • G09G2360/126The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Image Input (AREA)
  • Television Signal Processing For Recording (AREA)
  • Semiconductor Memories (AREA)

Abstract

[목적] 회로의 부가 및 변경이 거의 필요치 않으며 기존의 회로 구성으로 정지화상 보유 모드를 실현시킬 수 있도록 한 화상용 메모리 장치를 제공한다.
[구성] 시리얼 입출력 구성의 화상용 메모리 장치에 있어서 정지화상 보유 모드에서는 시리얼 입력 레지스터(2)로 부터 메모리 어레이 (1)로의 데이타 전송을 선택적으로 행하는 전송 게이트 회로(9)률 폐쇄하고 시리얼 입력 포트용 어드레스 카운터 (5)의 카운트 동작에 의 해 메모리 어 레이 (1)를 액세스 함으로써 리 프레쉬 동작을 행한다.

Description

화상용 메모리 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일 실시예를 도시한 블럭도,
제2도는 제1도의 데이타 기록 시스템의 구체예를 도시한 구성도,
제3도는 기록 및 리프레쉬의 동작 타이밍 챠트.

Claims (2)

  1. 입력 데이타를 메모리 어레이를 기록하기 위한 시리얼 입력 레지스터와, 상기 메모리 어레이에 대한 기록 어드레스를 지정하기 위한 시리얼 포트용 어드레스 카운터와. 상기 시리얼 입력 레지스터로부터 상기 메모리 어레이로의 데이타전송을 선택적으로 행하는 전송게이트 회로와, 정 지화상 보유 모드를 설정하는 정 지화상 보유 모드 설정 수단을 구비하고, 상기 정지화상 보유 모드에서 상기 전송 게이트 회로를 폐쇄하고 상기 시리얼 입력 포트용 어드레스 카운터의 카운터 동작에 의해 상기 메모리 어레이률 액세스함을 특징으로 하는 화상용 메모리 장치.
  2. 제1항에 있어서, 상기 정지화상보유 모드 설정 수단은 상기 전송 게이트 회로를 폐쇄 상태로하는 기록 전송 금지 신호를 발생시키고, 상기 시리얼 입력 포트용 어드레스카운터는 상기 기록 전송금지 신호에 응답하여 카운트 동작을 개시함을 특징으로 하는 화상용 메모리 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930010491A 1992-06-15 1993-06-10 화상용메모리장치 KR100282313B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP92-181815 1992-06-15
JP4181815A JPH0644366A (ja) 1992-06-15 1992-06-15 画像用メモリ装置

Publications (2)

Publication Number Publication Date
KR940001434A true KR940001434A (ko) 1994-01-11
KR100282313B1 KR100282313B1 (ko) 2001-02-15

Family

ID=16107318

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930010491A KR100282313B1 (ko) 1992-06-15 1993-06-10 화상용메모리장치

Country Status (3)

Country Link
US (1) US5854635A (ko)
JP (1) JPH0644366A (ko)
KR (1) KR100282313B1 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1186165B1 (de) * 1999-06-21 2003-01-22 Infineon Technologies AG Bilddaten-speichervorrichtung
US7978095B2 (en) * 2005-11-22 2011-07-12 Stmicroelectronics, Inc. Test mode circuitry for a programmable tamper detection circuit
US7443176B2 (en) * 2005-11-22 2008-10-28 Stmicroelectronics, Inc. Test mode and test method for a temperature tamper detection circuit
US7362248B2 (en) * 2005-11-22 2008-04-22 Stmicroelectronics, Inc. Temperature tamper detection circuit and method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3381991D1 (de) * 1982-06-28 1990-12-20 Toshiba Kawasaki Kk Bildanzeigesteuereinrichtung.
US5218673A (en) * 1983-10-12 1993-06-08 Canon Kabushiki Kaisha Information processing system
GB2172177A (en) * 1985-03-06 1986-09-10 Philips Electronic Associated Electronic information display systems
JP2698105B2 (ja) * 1987-07-28 1998-01-19 三洋電機株式会社 ディジタルテレビジョン受像機
JP2617779B2 (ja) * 1988-08-31 1997-06-04 三菱電機株式会社 半導体メモリ装置
US5016107A (en) * 1989-05-09 1991-05-14 Eastman Kodak Company Electronic still camera utilizing image compression and digital storage
JP2840320B2 (ja) * 1989-09-20 1998-12-24 株式会社日立製作所 半導体記憶装置

Also Published As

Publication number Publication date
US5854635A (en) 1998-12-29
JPH0644366A (ja) 1994-02-18
KR100282313B1 (ko) 2001-02-15

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