KR930005137A - 반도체 디바이스상에 질화물층을 형성시키는 방법 - Google Patents

반도체 디바이스상에 질화물층을 형성시키는 방법 Download PDF

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KR930005137A
KR930005137A KR1019920015405A KR920015405A KR930005137A KR 930005137 A KR930005137 A KR 930005137A KR 1019920015405 A KR1019920015405 A KR 1019920015405A KR 920015405 A KR920015405 A KR 920015405A KR 930005137 A KR930005137 A KR 930005137A
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layer
titanium
reaction chamber
heated
ammonia gas
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KR1019920015405A
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KR100285139B1 (ko
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엠. 필립피악 스탠리
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찰스 알. 루이스
모토로라 인코포레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3211—Nitridation of silicon-containing layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)
  • Solid-Phase Diffusion Into Metallic Material Surfaces (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

내용 없음.

Description

반도체 디바이스상에 질화물층을 형성시키는 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 군 A에 해당하는 웨이퍼의 디펙트 영역을 500x의 확대로 나타낸 현미경 사진도,
제2도는 군 B에 해당하는 웨이퍼의 디펙트 영역을 500x의 확대로 나타낸 현미경 사진도,
제3도는 군 C에 해당하는 웨이퍼의 디펙트 영역을 500x의 확대로 나타낸 현미경 사진도.

Claims (2)

  1. 질과물막 제조 방법으로서, 티타늄, 하프늄, 지르코늄, 바나듐 및 탄탈륨으로 이루어진 군으로부터 선택되는 물질로 된 오버라잉 층을 갖는 기판을 제공하고, 기관을 반응실에 놓고, 반응실에 있는 기판을 소정 온도로 가열하고, 600℃ 이하의 온도로 가열된 암모니아 가스를 반응실내로 유입시키고, 그리고 질화물이 형성되도록, 사전 가열된 암모니아 가스와 상기 물질로 이루어진 층을 서로 반응시키는 단계로 이루어진 질화물막 제조 방법.
  2. 사전 가열된 암모니아를 이용, 터타늄 질화물 장벽층을 갖는 반도체 디바이스 제조 방법으로서, 실리콘 웨이퍼를 제공하고, 실리콘 웨이퍼상에 터타늄 층을 증착시키고, 반응실에서 600℃ 이상의 온도로 실리콘 웨이퍼와 오버라잉 티타늄층을 가열시키고, 반응실로부터 분리된 용기에 있는 암모니아 가스를 700℃ 이상의 온도로 가열시키고, 가열된 암모니아 가스를 반응실내로 유입시키고, 오버라잉 티타늄층에 티타늄 질화물층이 형성되도록 2분여의 시간 주기동안 실리콘 웨이퍼상의 오버라잉 티타늄층과 가열된 암모니아 가스를 서로 반응시키고, 그리고 알루미늄 및 알루미늄 합금으로 이루어진 군으로부터 선택되는 물질로 된 층을 티타늄 질화물층 상에 중착시키는 단계로 이루어진 티타늄 질화물 장벽층을 갖는 반도체 디바이스 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920015405A 1991-08-26 1992-08-26 반도체 디바이스 상에 질화물층을 형성시키는 방법 KR100285139B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/749,820 US5188979A (en) 1991-08-26 1991-08-26 Method for forming a nitride layer using preheated ammonia
US749,820 1991-08-26

Publications (2)

Publication Number Publication Date
KR930005137A true KR930005137A (ko) 1993-03-23
KR100285139B1 KR100285139B1 (ko) 2001-04-02

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KR1019920015405A KR100285139B1 (ko) 1991-08-26 1992-08-26 반도체 디바이스 상에 질화물층을 형성시키는 방법

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Country Link
US (1) US5188979A (ko)
EP (1) EP0535354B1 (ko)
JP (1) JP3303144B2 (ko)
KR (1) KR100285139B1 (ko)
DE (1) DE69205938T2 (ko)

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Also Published As

Publication number Publication date
EP0535354A1 (en) 1993-04-07
EP0535354B1 (en) 1995-11-08
DE69205938D1 (de) 1995-12-14
JPH05302160A (ja) 1993-11-16
DE69205938T2 (de) 1996-05-30
JP3303144B2 (ja) 2002-07-15
US5188979A (en) 1993-02-23
KR100285139B1 (ko) 2001-04-02

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