KR920003654A - 반도체 집적회로장치 - Google Patents

반도체 집적회로장치 Download PDF

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Publication number
KR920003654A
KR920003654A KR1019910011678A KR910011678A KR920003654A KR 920003654 A KR920003654 A KR 920003654A KR 1019910011678 A KR1019910011678 A KR 1019910011678A KR 910011678 A KR910011678 A KR 910011678A KR 920003654 A KR920003654 A KR 920003654A
Authority
KR
South Korea
Prior art keywords
terminal
semiconductor element
field effect
effect semiconductor
integrated circuit
Prior art date
Application number
KR1019910011678A
Other languages
English (en)
Other versions
KR950001308B1 (ko
Inventor
아끼라 야마자키
야스끼 구마노
야스히로 고니시
가쯔끼 도오자까
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시기가이샤 filed Critical 시기 모리야
Publication of KR920003654A publication Critical patent/KR920003654A/ko
Application granted granted Critical
Publication of KR950001308B1 publication Critical patent/KR950001308B1/ko

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/26Modifications for temporary blocking after receipt of control pulses
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356008Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/223Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

내용 없음

Description

반도체 집적회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 한 실시예의 파워온리세트펄스 발생회로의 구성을 표시하는 회로도,
제2도는 제1도의 파워온티세트펄스발생회로를 보다 상세하게 표시하는 회로도,
제3도는 제1도 및 제2도의 파워온리세트발생회로의 동작을 설명하기 위한 파형도.

Claims (1)

  1. 전원에 결합되는 회로수단에 접속되고, 또한 상기 전원이 끊어졌을때에 상기 회로수단에 잔류하는 전하를 제거하는 반도체집적회로장치이고, 기준전위원과 상기 기준전위원에 접속되는 제어단자와 상기 회로수단에 접속되는 제1의 도통 단자와 제2의 도통단자를 가지는 제1의 전계효과 반도체소자와, 상기 제1의 전계효과반도체소자의 상기 제2의 도통단자에 접속되는 제1의 도통단자와 상기 기준전위원에 접속되는 제2의 도통단자와 제어단자를 가지는 제2의 전계효과 반도체소자와, 상기 전원과 상기 제2의 전계효과 반도체소자의 상기 제어단자와의 사이에 접속되는 용량소자를 구비하고, 상기 제2의 전계효과 반도체소자의 상기 제1의 도통단자 및 상기 제어단자는 서로 접속되는 반도체집적회로장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910011678A 1990-07-13 1991-07-10 반도체 집적회로장치 KR950001308B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2186503A JPH0474015A (ja) 1990-07-13 1990-07-13 半導体集積回路装置
JP2-186503 1990-07-13

Publications (2)

Publication Number Publication Date
KR920003654A true KR920003654A (ko) 1992-02-29
KR950001308B1 KR950001308B1 (ko) 1995-02-15

Family

ID=16189636

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910011678A KR950001308B1 (ko) 1990-07-13 1991-07-10 반도체 집적회로장치

Country Status (4)

Country Link
US (1) US5151614A (ko)
JP (1) JPH0474015A (ko)
KR (1) KR950001308B1 (ko)
DE (1) DE4122978C2 (ko)

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US5477176A (en) * 1994-06-02 1995-12-19 Motorola Inc. Power-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memory
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US5821787A (en) * 1994-10-05 1998-10-13 Altera Corporation Power-on reset circuit with well-defined reassertion voltage
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US5864251A (en) * 1994-10-28 1999-01-26 Cypress Semiconductor Corporation Method and apparatus for self-resetting logic circuitry
JP3409938B2 (ja) * 1995-03-02 2003-05-26 株式会社東芝 パワーオンリセット回路
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JPH1186525A (ja) * 1997-09-09 1999-03-30 Mitsubishi Electric Corp パワーオンリセット回路
US6115836A (en) * 1997-09-17 2000-09-05 Cypress Semiconductor Corporation Scan path circuitry for programming a variable clock pulse width
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US5889728A (en) * 1998-02-10 1999-03-30 Cypress Semiconductor Corporation Write control method for memory devices
US6081475A (en) * 1998-02-10 2000-06-27 Cypress Semiconductor Corporation Write control apparatus for memory devices
KR100301252B1 (ko) * 1999-06-23 2001-11-01 박종섭 파워 온 리셋 회로
US6222393B1 (en) 1999-07-20 2001-04-24 Cypress Semiconductor Corporation Apparatus and method for generating a pulse signal
DE10134557C2 (de) * 2001-07-16 2003-07-31 Infineon Technologies Ag Schaltungsanordnung und Verfahren zum Entladen mindestens eines Schaltungsknotens
JP3979921B2 (ja) * 2002-11-06 2007-09-19 沖電気工業株式会社 高電圧検出回路
US7120805B2 (en) * 2003-04-11 2006-10-10 Dell Products L.P. Draining residual charge from a voltage plane
EP1492234A3 (en) * 2003-06-26 2006-03-15 STMicroelectronics Pvt. Ltd Power on reset circuit
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Also Published As

Publication number Publication date
DE4122978C2 (de) 1993-10-07
US5151614A (en) 1992-09-29
JPH0474015A (ja) 1992-03-09
DE4122978A1 (de) 1992-02-06
KR950001308B1 (ko) 1995-02-15

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