KR910013487A - 비정질 실리콘 tft제조방법 - Google Patents
비정질 실리콘 tft제조방법 Download PDFInfo
- Publication number
- KR910013487A KR910013487A KR1019890019107A KR890019107A KR910013487A KR 910013487 A KR910013487 A KR 910013487A KR 1019890019107 A KR1019890019107 A KR 1019890019107A KR 890019107 A KR890019107 A KR 890019107A KR 910013487 A KR910013487 A KR 910013487A
- Authority
- KR
- South Korea
- Prior art keywords
- amorphous silicon
- silicon tft
- tft manufacturing
- manufacturing
- note
- Prior art date
Links
- 229910021417 amorphous silicon Inorganic materials 0.000 title claims 2
- 238000004519 manufacturing process Methods 0.000 title claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 239000011521 glass Substances 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/326—Application of electric currents or fields, e.g. for electroforming
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 고안 TFT의 단면도.
Claims (1)
- 유리기판(1)위에 Al(2)과 Cr(3)을 2층으로 형성하여 2층 게이트 버스라인을 이루게하고 이들 Al(2)과 Cr(3) 위에는 투명 전도막(5)을 실리콘 질화막(4)(6)사이에 중착시킴을 특징으로하는 비정질 실리콘 TFT제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890019107A KR960013505B1 (ko) | 1989-12-21 | 1989-12-21 | 비정질 실리콘 tft 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890019107A KR960013505B1 (ko) | 1989-12-21 | 1989-12-21 | 비정질 실리콘 tft 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910013487A true KR910013487A (ko) | 1991-08-08 |
KR960013505B1 KR960013505B1 (ko) | 1996-10-05 |
Family
ID=19293287
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890019107A KR960013505B1 (ko) | 1989-12-21 | 1989-12-21 | 비정질 실리콘 tft 제조방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960013505B1 (ko) |
-
1989
- 1989-12-21 KR KR1019890019107A patent/KR960013505B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR960013505B1 (ko) | 1996-10-05 |
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E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20070928 Year of fee payment: 12 |
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LAPS | Lapse due to unpaid annual fee |