KR910013551A - 2층 다결정실리콘을 이용한 sram셀의 저항증가 방법 - Google Patents

2층 다결정실리콘을 이용한 sram셀의 저항증가 방법 Download PDF

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Publication number
KR910013551A
KR910013551A KR1019890020113A KR890020113A KR910013551A KR 910013551 A KR910013551 A KR 910013551A KR 1019890020113 A KR1019890020113 A KR 1019890020113A KR 890020113 A KR890020113 A KR 890020113A KR 910013551 A KR910013551 A KR 910013551A
Authority
KR
South Korea
Prior art keywords
sram cell
increasing resistance
layer polysilicon
polysilicon
polycrystalline silicon
Prior art date
Application number
KR1019890020113A
Other languages
English (en)
Inventor
배동주
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019890020113A priority Critical patent/KR910013551A/ko
Publication of KR910013551A publication Critical patent/KR910013551A/ko

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3215Doping the layers
    • H01L21/32155Doping polycristalline - or amorphous silicon layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음.

Description

2층 다결정실리콘을 이용한 SRAM셀의 저항증가 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 다결정실리콘 저항 형성 방법을 나타내는 평면도.

Claims (1)

  1. 다결정 실리콘을 부하 저항으로 사용하는 SRAM셀에 있어서, 상기 다결정실리콘이 다층 구조를 가짐을 특징으로 하는 SRAM 셀의 부하저항 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890020113A 1989-12-29 1989-12-29 2층 다결정실리콘을 이용한 sram셀의 저항증가 방법 KR910013551A (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890020113A KR910013551A (ko) 1989-12-29 1989-12-29 2층 다결정실리콘을 이용한 sram셀의 저항증가 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890020113A KR910013551A (ko) 1989-12-29 1989-12-29 2층 다결정실리콘을 이용한 sram셀의 저항증가 방법

Publications (1)

Publication Number Publication Date
KR910013551A true KR910013551A (ko) 1991-08-08

Family

ID=67662365

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890020113A KR910013551A (ko) 1989-12-29 1989-12-29 2층 다결정실리콘을 이용한 sram셀의 저항증가 방법

Country Status (1)

Country Link
KR (1) KR910013551A (ko)

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