KR910004038B1 - 반도체 장치의 금속배선용 활성화 가능 도통링크 및 그의 제조 및 활성화 방법 - Google Patents

반도체 장치의 금속배선용 활성화 가능 도통링크 및 그의 제조 및 활성화 방법 Download PDF

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Publication number
KR910004038B1
KR910004038B1 KR1019870008776A KR870008776A KR910004038B1 KR 910004038 B1 KR910004038 B1 KR 910004038B1 KR 1019870008776 A KR1019870008776 A KR 1019870008776A KR 870008776 A KR870008776 A KR 870008776A KR 910004038 B1 KR910004038 B1 KR 910004038B1
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KR
South Korea
Prior art keywords
wiring
conductive link
wirings
aluminum
via hole
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
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KR1019870008776A
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English (en)
Korean (ko)
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KR880003407A (ko
Inventor
료이찌 무까이
Original Assignee
후지쓰 가부시끼가이샤
야마모도 다꾸마
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Publication date
Application filed by 후지쓰 가부시끼가이샤, 야마모도 다꾸마 filed Critical 후지쓰 가부시끼가이샤
Publication of KR880003407A publication Critical patent/KR880003407A/ko
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Publication of KR910004038B1 publication Critical patent/KR910004038B1/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/491—Antifuses, i.e. interconnections changeable from non-conductive to conductive
    • H10W20/492—Antifuses, i.e. interconnections changeable from non-conductive to conductive changeable by the use of an external beam, e.g. laser beam or ion beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/093—Laser beam treatment in general

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1019870008776A 1986-08-12 1987-08-11 반도체 장치의 금속배선용 활성화 가능 도통링크 및 그의 제조 및 활성화 방법 Expired KR910004038B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP189094 1986-08-12
JP61189094A JPS6344739A (ja) 1986-08-12 1986-08-12 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR880003407A KR880003407A (ko) 1988-05-17
KR910004038B1 true KR910004038B1 (ko) 1991-06-22

Family

ID=16235236

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870008776A Expired KR910004038B1 (ko) 1986-08-12 1987-08-11 반도체 장치의 금속배선용 활성화 가능 도통링크 및 그의 제조 및 활성화 방법

Country Status (5)

Country Link
US (1) US4968643A (https=)
EP (1) EP0256494B1 (https=)
JP (1) JPS6344739A (https=)
KR (1) KR910004038B1 (https=)
DE (1) DE3783404T2 (https=)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5070392A (en) * 1988-03-18 1991-12-03 Digital Equipment Corporation Integrated circuit having laser-alterable metallization layer
US5250465A (en) * 1991-01-28 1993-10-05 Fujitsu Limited Method of manufacturing semiconductor devices
US5451811A (en) * 1991-10-08 1995-09-19 Aptix Corporation Electrically programmable interconnect element for integrated circuits
US5321322A (en) * 1991-11-27 1994-06-14 Aptix Corporation Programmable interconnect architecture without active devices
WO1993012582A1 (en) * 1991-12-13 1993-06-24 Knights Technology, Inc. Programmable logic device cell and method
JPH0799791B2 (ja) * 1992-04-15 1995-10-25 インターナショナル・ビジネス・マシーンズ・コーポレイション 透明基板上の回路ライン接続方法
JPH06124913A (ja) * 1992-06-26 1994-05-06 Semiconductor Energy Lab Co Ltd レーザー処理方法
KR960009996B1 (ko) * 1992-08-24 1996-07-25 금성일렉트론 주식회사 반도체 소자의 리페어장치 및 그 배치방법
US5453402A (en) * 1992-12-15 1995-09-26 Advanced Micro Devices, Inc. Selective metal via plug growth technology for deep sub-micrometer ULSI
JPH06260441A (ja) * 1993-03-03 1994-09-16 Nec Corp 半導体装置の製造方法
US5940727A (en) * 1994-10-11 1999-08-17 Massachusetts Institute Of Technology Technique for producing interconnecting conductive links
KR100363410B1 (ko) 1994-03-10 2003-02-11 메사추세츠 인스티튜트 오브 테크놀로지 상호접속용도전링크제조방법
US5585602A (en) * 1995-01-09 1996-12-17 Massachusetts Institute Of Technology Structure for providing conductive paths
US5861325A (en) * 1994-03-10 1999-01-19 Massachusetts Institute Of Technology Technique for producing interconnecting conductive links
US5920789A (en) * 1994-10-11 1999-07-06 Massachusetts Institute Of Technology Technique for producing interconnecting conductive links
TW278229B (en) * 1994-12-29 1996-06-11 Siemens Ag Fuse structure for an integrated circuit device and method for manufacturing a fuse structure
JP3160198B2 (ja) * 1995-02-08 2001-04-23 インターナショナル・ビジネス・マシーンズ・コーポレ−ション デカップリング・コンデンサが形成された半導体基板及びこれの製造方法
US5731047A (en) * 1996-11-08 1998-03-24 W.L. Gore & Associates, Inc. Multiple frequency processing to improve electrical resistivity of blind micro-vias
JPH10229125A (ja) * 1997-02-14 1998-08-25 Nec Corp 半導体装置
US6288437B1 (en) * 1999-02-26 2001-09-11 Micron Technology, Inc. Antifuse structures methods and applications
US6472253B1 (en) 1999-11-15 2002-10-29 Vlsi Technology, Inc. Programmable semiconductor device structures and methods for making the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5780738A (en) * 1980-11-07 1982-05-20 Seiko Epson Corp Semiconductor integrated device
US4585490A (en) * 1981-12-07 1986-04-29 Massachusetts Institute Of Technology Method of making a conductive path in multi-layer metal structures by low power laser beam
JPS5996746A (ja) * 1982-11-26 1984-06-04 Hitachi Ltd 半導体装置およびその製造方法
ATE56310T1 (de) * 1984-06-27 1990-09-15 Contraves Ag Verfahren zur herstellung eines basismaterials fuer eine hybridschaltung.
US4674176A (en) * 1985-06-24 1987-06-23 The United States Of America As Represented By The United States Department Of Energy Planarization of metal films for multilevel interconnects by pulsed laser heating
US4681795A (en) * 1985-06-24 1987-07-21 The United States Of America As Represented By The Department Of Energy Planarization of metal films for multilevel interconnects
US4814578A (en) * 1985-06-24 1989-03-21 The United States Of America As Represented By The Department Of Energy Planarization of metal films for multilevel interconnects
JPS62293740A (ja) * 1986-06-13 1987-12-21 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
DE3783404T2 (de) 1993-05-06
EP0256494A2 (en) 1988-02-24
DE3783404D1 (de) 1993-02-18
KR880003407A (ko) 1988-05-17
US4968643A (en) 1990-11-06
JPS6344739A (ja) 1988-02-25
JPH058864B2 (https=) 1993-02-03
EP0256494A3 (en) 1988-07-27
EP0256494B1 (en) 1993-01-07

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