KR910002250A - Round-Robin Selective Bus Arbitration Circuit - Google Patents

Round-Robin Selective Bus Arbitration Circuit Download PDF

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Publication number
KR910002250A
KR910002250A KR1019890009180A KR890009180A KR910002250A KR 910002250 A KR910002250 A KR 910002250A KR 1019890009180 A KR1019890009180 A KR 1019890009180A KR 890009180 A KR890009180 A KR 890009180A KR 910002250 A KR910002250 A KR 910002250A
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KR
South Korea
Prior art keywords
bus
signal
control signal
bus arbitration
arbitration
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Application number
KR1019890009180A
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Korean (ko)
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KR910008418B1 (en
Inventor
이해영
Original Assignee
정용문
삼성전자 주식회사
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Priority to KR1019890009180A priority Critical patent/KR910008418B1/en
Publication of KR910002250A publication Critical patent/KR910002250A/en
Application granted granted Critical
Publication of KR910008418B1 publication Critical patent/KR910008418B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

내용 없음No content

Description

라운드로빈 선택방식의 버스중재회로Round-Robin Selective Bus Arbitration Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 블록구성도.2 is a block diagram according to the present invention.

제3도는 제2도중 상태 1일시의 구체회로도.3 is a concrete circuit diagram of state 1 of FIG. 2.

제4도는 버스중재의 일예를 설명하는 타이밍도.4 is a timing diagram illustrating an example of bus arbitration.

Claims (1)

VME버스를 사용하는 시스템의 버스중재회로에 있어서, 제2제어신호 발생시 각 버스마스터의 버스 요구신호를 입력하며 제1제어신호 발생시 현재의 버스 요구상태를 유지하는 멀티플렉서와, 상기 멀티플렉서에서 버스요구 신호 발생기 상기 제1제어신호를 발생하며, 버스 사용신호 발생기 상기 제2제어신호를 발생하는 제어신호 발생부와, 상기 버스 사용신호 해제시마다 동작되어 버스 중재의 동일한 상기 카운터의 출력에 따른 선택신호를 발생하는 디코더와, 상기 멀티플렉서의 출력을 입력하며, 상기 디코더의 출력에 의해 해당 중재부가 인에이블되어 자체 중재부의 버스중재 우선권에 따라 버스 승인신호를 발생하는 버스 중재부로 구성됨을 특징으로 하는 라운드 로빈 방식의 버스 중재회로.A bus arbitration circuit of a system using a VME bus, comprising: a multiplexer for inputting a bus request signal of each bus master when a second control signal is generated and maintaining a current bus request state when a first control signal is generated; and a bus request signal from the multiplexer A generator generates the first control signal, and a bus use signal generator generates a control signal for generating the second control signal, and is activated every time the bus use signal is released to generate a selection signal according to the output of the same counter of bus arbitration. And a bus arbitration unit for inputting an output of the multiplexer, the arbitration unit being enabled by the output of the decoder, and generating a bus acknowledgment signal according to the bus arbitration priority of the arbitration unit. Bus arbitration circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890009180A 1989-06-30 1989-06-30 Bus arbitration circuit in round-robin selecting method KR910008418B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890009180A KR910008418B1 (en) 1989-06-30 1989-06-30 Bus arbitration circuit in round-robin selecting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890009180A KR910008418B1 (en) 1989-06-30 1989-06-30 Bus arbitration circuit in round-robin selecting method

Publications (2)

Publication Number Publication Date
KR910002250A true KR910002250A (en) 1991-01-31
KR910008418B1 KR910008418B1 (en) 1991-10-15

Family

ID=19287639

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890009180A KR910008418B1 (en) 1989-06-30 1989-06-30 Bus arbitration circuit in round-robin selecting method

Country Status (1)

Country Link
KR (1) KR910008418B1 (en)

Also Published As

Publication number Publication date
KR910008418B1 (en) 1991-10-15

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