KR970007624A - Interrupt selection circuit by software control - Google Patents
Interrupt selection circuit by software control Download PDFInfo
- Publication number
- KR970007624A KR970007624A KR1019950019940A KR19950019940A KR970007624A KR 970007624 A KR970007624 A KR 970007624A KR 1019950019940 A KR1019950019940 A KR 1019950019940A KR 19950019940 A KR19950019940 A KR 19950019940A KR 970007624 A KR970007624 A KR 970007624A
- Authority
- KR
- South Korea
- Prior art keywords
- interrupt
- selection circuit
- signal
- interrupt selection
- software
- Prior art date
Links
Landscapes
- Bus Control (AREA)
Abstract
인터럽트 요구 신호를 발생하는 인터럽트 요구 장치와, 인터럽트 선택신호를 발생하는 제어 신호부와, 상기 제어 신호부에서 출력되는 인터럽트 선택신호를 입력받아 적합한 인터럽트 서비스 루틴을 수행하는 인터럽트 컨트롤러로 이루어지는 것을 특징으로 하는 소프트웨어 제어에 의한 인터럽트 선택회로는 소프트웨어적으로 인터럽트 요구 입력 단자를 선택하므로 시스템이 부팅된 다음에도 다른 인터럽트 요구 장치와 충돌하지 않고 원하는 인터럽트 서비스 루틴을 수행할 수 있다.An interrupt request device for generating an interrupt request signal, a control signal unit for generating an interrupt selection signal, and an interrupt controller for receiving an interrupt selection signal output from the control signal unit and performing an appropriate interrupt service routine; The interrupt selection circuit by software control selects the interrupt request input terminal in software so that the desired interrupt service routine can be performed even after the system is booted without conflict with other interrupt request devices.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제3도는 이 발명의 실시예에 따른 소프트웨어 제어에 의한 인터럽트 선택회로의 상세 회로도이다.3 is a detailed circuit diagram of an interrupt selection circuit by software control according to an embodiment of the present invention.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950019940A KR970007624A (en) | 1995-07-07 | 1995-07-07 | Interrupt selection circuit by software control |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950019940A KR970007624A (en) | 1995-07-07 | 1995-07-07 | Interrupt selection circuit by software control |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970007624A true KR970007624A (en) | 1997-02-21 |
Family
ID=66526840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950019940A KR970007624A (en) | 1995-07-07 | 1995-07-07 | Interrupt selection circuit by software control |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970007624A (en) |
-
1995
- 1995-07-07 KR KR1019950019940A patent/KR970007624A/en not_active Application Discontinuation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR900005311A (en) | Interrupt Control Device | |
KR970076288A (en) | Method and apparatus for providing a portable computer having a hot pluggable modular bay | |
KR970059951A (en) | Interrupt Distribution Technology for PCMCIA Cards | |
KR960042344A (en) | Interrupt control device that responds flexibly to many interrupt processing with small hardware scale | |
KR870010444A (en) | Data processor | |
KR870001514A (en) | controller | |
KR970007624A (en) | Interrupt selection circuit by software control | |
KR910003475A (en) | Sequence controller | |
KR930020652A (en) | Large scale integrated circuit devices | |
KR970022742A (en) | Method of sharing control signal in computer system and apparatus implementing the same | |
KR970012172A (en) | BUS CONTROLLER DEVICE FOR MULTI-Microprocessors | |
KR950020194A (en) | Shared device of Inter Tripline | |
KR970016989A (en) | On-key processing circuit with clear function of electronic calculator | |
KR950006613A (en) | Bus transfer between central processing unit and peripherals | |
KR980004068A (en) | Data input / output device | |
KR970016992A (en) | Interrupt Controller of Shared I / O Control Board in Multiprocessor System | |
KR940017196A (en) | Graphic dedicated control circuit | |
RU97107751A (en) | DIGITAL DIAGNOSTIC SYSTEM | |
KR970016985A (en) | High speed data transfer method | |
KR970002653A (en) | Random Accessible FIFO | |
KR940002723A (en) | Multiprocessor Interface Unit | |
KR930018387A (en) | Interrupt handler | |
KR940012151A (en) | Address expansion unit | |
KR960025129A (en) | Control signal regulator between two processors with different pulse rates | |
KR960039991A (en) | Address Computing Device Using Multiple Loops |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |