KR910002011A - Mos형 반도체장치와 그 제조방법 - Google Patents

Mos형 반도체장치와 그 제조방법 Download PDF

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KR910002011A
KR910002011A KR1019900008628A KR900008628A KR910002011A KR 910002011 A KR910002011 A KR 910002011A KR 1019900008628 A KR1019900008628 A KR 1019900008628A KR 900008628 A KR900008628 A KR 900008628A KR 910002011 A KR910002011 A KR 910002011A
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semiconductor device
insulating film
channel region
manufacturing
gate insulating
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KR1019900008628A
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나오또 이노우에
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하라 레이노스께
세이꼬 덴시고교 가부시끼가이샤
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Publication of KR910002011A publication Critical patent/KR910002011A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer

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Abstract

내용 없음

Description

MOS형 반도체장치와 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1도는 MOS형 실리콘 N채널 트랜지스터의 구조적인 단면도,
제 2도는 가열온도와 SiO2막 및 인터페이스트랩내에 트랩된 전자수 사이의 관계를 나타낸 도면,
제 3도는 부유게이트형 메모리트랜지스터의 구조적인 단면도,

Claims (7)

  1. 열산화 실리콘이 산화물로 구성된 게이트절연막을 형성하기 위해 트리클로르에탄과 혼합된 산소의 혼합가스내에 열산화가 수행되는 것을 특징으로 하는 MOS형 반도체장치의 제조방법.
  2. 제1항에 있어서,열산화 1000℃내지 1100℃사이의 온도에서 수행되는 것을 특징으로 하는 MOS형 반도체장치의 제조방법.
  3. 제1항에 있어서,MOS트랜지스터의 반도체 장치를 제조하는 경우 혼합가스는 0.8%이하의 트리클로르에탄을 함유하는 것을 특징으로 하는 MOS형 반도체장치의 제조방법.
  4. 제1항에 있어서,MOS형 부유게이트 메모리트랜지스터의 반도체장치를 제조하는 경우 혼합가스는 0.4%이하의 트리클로르에탄을 함유하는 것을 특징으로 하는 MOS형 반도체장치의 제조방법.
  5. 제1도전형의 채널영역과, 이 채널영역의 대향하는 단부에서 상호 일정한 거리를 유지하는 역도전형(제2도전형)의 1쌍의 소오스영역과 드레인영역, 상기 채널영역상에 형성된 게이트절연막 및, 이 게이트절연막상에 형성된 게이트전역을 갖추고 있는 MOS형 반도체장치의 제조방법에 있어서, 다결정실리콘게이트전극은 염소가 함유된 가스의 분해에 의해 형성되고, 상기 게이트전극의 형성후 열처리에 의해 염소가 게이트절연막으로 확산되는 것을 특징으로 하는 MOS형 반도체장치의 제조방법.
  6. 제1도전형의 채널영역과, 이 채널영역의 대향되는 단부에서 상호 일정한 거리를 유지하는 역도전형의 1쌍의 소오스영역과 드레인영역, 상기 채널영역상에 형성된 게이트절연막 및, 이 게이트절연막상에 형성된 게이트전극을 갖춘 MOS형 반도체장치의 제조방법에 있어서, 상기 게이트전극형성후 가열처리는 염소 또는 불소가 게이트절연막내에 확산되도록 염소 또는 불소를 함유한 가스분위기 내에서 수행되는 것을 특징으로 하는 MOS형 반도체장치의 제조방법.
  7. 제1도전형의 채널영역과, 이 채널영역의 대향되는 단부에서 상호 일정한 거리를 유지하는 역도전형의 1쌍의 소오스영역과 드레인영역,상기 채널영역상에 염소를 함유한 실리콘이산화물로 형성된 게이트절연막 및, 이 게이트절연막상에 형성된 게이트 전극으로 구성된 것을 특징으로 하는 MOS형 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900008628A 1989-06-12 1990-06-12 Mos형 반도체장치와 그 제조방법 KR910002011A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP14907589 1989-06-12
JP1-149075 1989-06-12
JP2-109703 1990-04-25
JP10970390 1990-04-25

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KR910002011A true KR910002011A (ko) 1991-01-31

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69131376T2 (de) * 1990-12-21 1999-10-21 Siliconix Inc Verfahren zur Herstellung von doppelt-diffundierten integrierten MOSFET-Zellen
JP2691385B2 (ja) * 1991-10-29 1997-12-17 株式会社半導体エネルギー研究所 半導体メモリー装置
US5721176A (en) * 1992-05-29 1998-02-24 Olin Corporation Use of oxalyl chloride to form chloride-doped silicon dioxide films of silicon substrates
KR100482747B1 (ko) * 2002-12-18 2005-04-14 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7704462A (en) * 1977-04-22 1978-10-24 Leuven Res & Dev Vzw Thermal oxidation of silicon semiconductor substrates - using mixture of oxygen and tri:chloroethane
US4606935A (en) * 1985-10-10 1986-08-19 International Business Machines Corporation Process and apparatus for producing high purity oxidation on a semiconductor substrate

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EP0405205A2 (en) 1991-01-02

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