KR900013727A - 디지탈/아날로그 변환기 - Google Patents

디지탈/아날로그 변환기 Download PDF

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Publication number
KR900013727A
KR900013727A KR1019900000311A KR900000311A KR900013727A KR 900013727 A KR900013727 A KR 900013727A KR 1019900000311 A KR1019900000311 A KR 1019900000311A KR 900000311 A KR900000311 A KR 900000311A KR 900013727 A KR900013727 A KR 900013727A
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KR
South Korea
Prior art keywords
output
digital
pulse width
grounding
digital signal
Prior art date
Application number
KR1019900000311A
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English (en)
Other versions
KR0150206B1 (ko
Inventor
다까아끼 야마다
가즈도시 시미즈메
Original Assignee
오가 노리오
소니 가부시기가이샤
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Priority claimed from JP1989019129U external-priority patent/JPH0810209Y2/ja
Priority claimed from JP1042578A external-priority patent/JPH02222212A/ja
Application filed by 오가 노리오, 소니 가부시기가이샤 filed Critical 오가 노리오
Publication of KR900013727A publication Critical patent/KR900013727A/ko
Application granted granted Critical
Publication of KR0150206B1 publication Critical patent/KR0150206B1/ko

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/82Digital/analogue converters with intermediate conversion to time interval
    • H03M1/822Digital/analogue converters with intermediate conversion to time interval using pulse width modulation

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

내용 없음

Description

디지털/아날로그 변환기
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본원 발명이 적용되는 노이즈 쉐이핑 1비트 D/A 변환기의 전체의 블록도.
제2도는 디치레벨 아날로그 출력을 발생하기 위한 PWM형 D/A변환기의 구성을 나타내는 블록도.
제3도는 제2도의 동작을 설명하기 위한 파형도.

Claims (3)

  1. 샘플링주파수 fs를 가진 원래의 디지털 신호를 공급받아 샘플링 주파수 Nfe(N〉1)와 상기 원래의 디지털신호보다 비트수가 작은 수정디지탈 신호를 발생하기 위한 디지털삽입필터수단과, 상기 수정디지탈신호를 공급받아 상기 수정디지탈신호에 대응하는 펄스 폭을 가진 펄스 신호를 발생하기 위한 펄스폭변조수단과, 상기 펄스폭변조수단의 출력을 공급받아 P채널 및 N채널트랜지스터로 이루어진 CMOS인버터회로를 가진 출력버퍼수단과, 상기 출력버퍼수단의 출력을 공급받는 로우패스필터수단으로 이루어지며, 상기 디지털삽입필터수단, 상기 펄스폭변조수단 및 상기 출력버퍼 수단을 집적회로로 형성되며, 상기 P채널 및 N채널트랜지스터 중 하나는 그 기판에 공급되는 전압을 제어하여 저항치를 저항치를 조정하는 수단을 가지는 것을 특징으로 하는 디지털/아날로그 변환기.
  2. 제1항에 있어서, 상기 출력버퍼수단은 제1출력을 발생하는 제1CMOS인버터회로와, 제2출력을 발생하기 위하여 직렬로 접속된 제2 및 제3 CMOS인버터회로를 구비하며, 상기 로우패스필터수단은 상기 제1출력을 공급받은 제1로우패스필터와, 상기 제2출력을 공급받는 제2로울패스필터와, 상기 제1및 제2로우패스필터의 출력을공급받는 차동회로를 구비하는 것을 특징으로 하는 디지털/아날로그 변환기.
  3. 제1항에 있어서, 상기 집적회로는 최소한 상기 디지털 삽입필터 수단과 펄스 폭변조 수단을 포함하는 제1회로부를 접지하는 제1접지 수단과, 최소한 상기 출력버퍼수단을 포함하는 제2회로부를 접지하는 제2접지 수단과, 상기 제1 및 제2회로의 경제부를 접지하는 제3접지수단을 포함하는 것을 특징으로 하는 디지털/아날로그 변환기.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900000311A 1989-02-21 1990-01-12 디지탈/아날로그 변환기 KR0150206B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP1-19129 1988-02-21
JP42578 1988-02-22
JP1989019129U JPH0810209Y2 (ja) 1989-02-21 1989-02-21 集積回路
JP119129 1989-02-21
JP1042578A JPH02222212A (ja) 1989-02-22 1989-02-22 Pwm波出力回路

Publications (2)

Publication Number Publication Date
KR900013727A true KR900013727A (ko) 1990-09-06
KR0150206B1 KR0150206B1 (ko) 1998-12-15

Family

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Application Number Title Priority Date Filing Date
KR1019900000311A KR0150206B1 (ko) 1989-02-21 1990-01-12 디지탈/아날로그 변환기

Country Status (4)

Country Link
US (1) US5023615A (ko)
KR (1) KR0150206B1 (ko)
DE (1) DE4005489C2 (ko)
GB (1) GB2228381B (ko)

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JPH0421215A (ja) * 1990-05-16 1992-01-24 Sony Corp デジタル・アナログ変換器
US6219909B1 (en) * 1990-11-28 2001-04-24 Hitachi, Ltd. Method of mounting disk drive apparatus
JPH05347563A (ja) * 1992-06-12 1993-12-27 Sony Corp D/a変換装置
GB2364838B (en) 1998-03-04 2002-03-20 Fujitsu Ltd Mixed-signal circuitry and integrated circuit devices
US6208280B1 (en) 1999-01-11 2001-03-27 Seagate Technology Llc Converting a pulse-width modulation signal to an analog voltage
DE10156744B4 (de) * 2001-11-19 2007-01-25 Infineon Technologies Ag Linearer PCM/PWM-Modulator
DE10255228A1 (de) * 2002-11-26 2004-06-03 Manfred Baier Serieller Digital- Analog-Umsetzer
US6950118B2 (en) * 2003-01-30 2005-09-27 Hewlett-Packard Development Company, L.P. Laser imaging device including a pulse width modulator system
US7042484B2 (en) * 2003-03-20 2006-05-09 Hewlett-Packard Development Company, L.P. Scan line length adjustment
DE10337782B4 (de) 2003-07-14 2007-03-01 Micronas Gmbh Methode und Schaltung zur effektiven Konvertierung von PCM-in PWM-Daten
EP1498803A3 (de) * 2003-07-14 2007-04-04 Micronas GmbH Methode und Schaltung zur effektiven Konvertierung vom PCM- in PWM-Daten
EP2019427B1 (en) 2007-07-27 2010-09-22 Fujitsu Semiconductor Limited Low-noise flip-chip packages and flip chips thereof

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EP0033510A3 (en) * 1980-02-04 1983-06-01 Texas Instruments Incorporated Speech synthesis system and method for exciting speech synthesis filter thereof
US4310831A (en) * 1980-02-04 1982-01-12 Texas Instruments Incorporated Pulse width modulated, push/pull digital to analog converter
GB2176070B (en) * 1985-05-31 1989-07-12 Int Standard Electric Corp Digital to analogue converter circuit arrangement and method of digital to analogue converter
DE3709207A1 (de) * 1987-02-28 1988-09-08 Standard Elektrik Lorenz Ag Schaltungsanordnung zum umwandeln von digitalen tonsignalwerten in ein analoges tonsignal
US4800365A (en) * 1987-06-15 1989-01-24 Burr-Brown Corporation CMOS digital-to-analog converter circuitry

Also Published As

Publication number Publication date
GB2228381A (en) 1990-08-22
DE4005489C2 (de) 1999-09-23
DE4005489A1 (de) 1990-08-23
KR0150206B1 (ko) 1998-12-15
GB2228381B (en) 1992-12-02
GB9003510D0 (en) 1990-04-11
US5023615A (en) 1991-06-11

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