KR900000171B1 - 퓨우즈형 정보기억회로를 갖춘 반도체집적회로장치 - Google Patents

퓨우즈형 정보기억회로를 갖춘 반도체집적회로장치 Download PDF

Info

Publication number
KR900000171B1
KR900000171B1 KR1019850001895A KR850001895A KR900000171B1 KR 900000171 B1 KR900000171 B1 KR 900000171B1 KR 1019850001895 A KR1019850001895 A KR 1019850001895A KR 850001895 A KR850001895 A KR 850001895A KR 900000171 B1 KR900000171 B1 KR 900000171B1
Authority
KR
South Korea
Prior art keywords
voltage
fuse
current control
level converting
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019850001895A
Other languages
English (en)
Korean (ko)
Other versions
KR850006785A (ko
Inventor
요시히로 다께마에
도미오 나까노
다께오 다데마쓰
노리히사 쓰게
쥰지 오가와
다까시 호리이
야스히로 후지
마사오 나까노
Original Assignee
후지쓰 가부시끼가이샤
야마모도 다꾸마
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쓰 가부시끼가이샤, 야마모도 다꾸마 filed Critical 후지쓰 가부시끼가이샤
Publication of KR850006785A publication Critical patent/KR850006785A/ko
Application granted granted Critical
Publication of KR900000171B1 publication Critical patent/KR900000171B1/ko
Expired legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
KR1019850001895A 1984-03-23 1985-03-22 퓨우즈형 정보기억회로를 갖춘 반도체집적회로장치 Expired KR900000171B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP59-055501 1984-03-23
JP55501 1984-03-23
JP59055501A JPS60201598A (ja) 1984-03-23 1984-03-23 半導体集積回路

Publications (2)

Publication Number Publication Date
KR850006785A KR850006785A (ko) 1985-10-16
KR900000171B1 true KR900000171B1 (ko) 1990-01-23

Family

ID=13000398

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850001895A Expired KR900000171B1 (ko) 1984-03-23 1985-03-22 퓨우즈형 정보기억회로를 갖춘 반도체집적회로장치

Country Status (5)

Country Link
US (1) US4707806A (https=)
EP (1) EP0159928B1 (https=)
JP (1) JPS60201598A (https=)
KR (1) KR900000171B1 (https=)
DE (1) DE3580690D1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2608826B1 (fr) * 1986-12-19 1989-03-17 Eurotechnique Sa Circuit integre comportant des elements d'aiguillage vers des elements de redondance dans une memoire
FR2623653B1 (fr) * 1987-11-24 1992-10-23 Sgs Thomson Microelectronics Procede de test de cellules de memoire electriquement programmable et circuit integre correspondant
JP2509730B2 (ja) * 1989-08-11 1996-06-26 株式会社東芝 半導体メモリ装置及びその製造方法
US5334880A (en) * 1991-04-30 1994-08-02 International Business Machines Corporation Low voltage programmable storage element
US5351101A (en) * 1993-08-31 1994-09-27 Eastman Kodak Company Photographic camera and film cartridge with double exposure prevention
US5384746A (en) * 1994-01-28 1995-01-24 Texas Instruments Incorporated Circuit and method for storing and retrieving data
JPH10335463A (ja) * 1997-05-29 1998-12-18 Nec Corp 半導体集積回路
US5973977A (en) * 1998-07-06 1999-10-26 Pmc-Sierra Ltd. Poly fuses in CMOS integrated circuits
FR2806907B1 (fr) 2000-03-31 2003-01-24 Oreal Composition cosmetique a base de nanoparticules et de composes organiques du silicium solubles dans l'eau
US6829737B1 (en) * 2000-08-30 2004-12-07 Micron Technology, Inc. Method and system for storing device test information on a semiconductor device using on-device logic for determination of test results
JP2002203901A (ja) * 2000-12-27 2002-07-19 Toshiba Microelectronics Corp フューズ回路
US6943575B2 (en) * 2002-07-29 2005-09-13 Micron Technology, Inc. Method, circuit and system for determining burn-in reliability from wafer level burn-in
JP4480649B2 (ja) * 2005-09-05 2010-06-16 富士通マイクロエレクトロニクス株式会社 ヒューズ素子及びその切断方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2505285C3 (de) * 1975-02-07 1978-07-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung zum Einstellen der Information bei einem programmierbaren ECL-Festwertspeicher
US4250570B1 (en) * 1976-07-15 1996-01-02 Intel Corp Redundant memory circuit
JPS5764392A (en) * 1980-10-03 1982-04-19 Mitsubishi Electric Corp Semiconductor integrated circuit
US4432070A (en) * 1981-09-30 1984-02-14 Monolithic Memories, Incorporated High speed PROM device
US4417154A (en) * 1982-02-08 1983-11-22 Motorola, Inc. Circuit for applying a high voltage signal to a fusible link
JPS58164099A (ja) * 1982-03-25 1983-09-28 Toshiba Corp 半導体メモリ−
JPS60103594A (ja) * 1983-11-10 1985-06-07 Fujitsu Ltd 情報記憶回路

Also Published As

Publication number Publication date
KR850006785A (ko) 1985-10-16
JPH0222479B2 (https=) 1990-05-18
EP0159928B1 (en) 1990-11-28
JPS60201598A (ja) 1985-10-12
EP0159928A3 (en) 1987-10-07
US4707806A (en) 1987-11-17
DE3580690D1 (de) 1991-01-10
EP0159928A2 (en) 1985-10-30

Similar Documents

Publication Publication Date Title
US5334880A (en) Low voltage programmable storage element
KR900000171B1 (ko) 퓨우즈형 정보기억회로를 갖춘 반도체집적회로장치
EP0355768B1 (en) Semiconductor memory cells and semiconductor memory device employing the semiconductor memory cells
US5442589A (en) Fuse circuitry having physical fuse and non-volatile memory cell coupled to a detector
US6498526B2 (en) Fuse circuit and program status detecting method thereof
KR910001533B1 (ko) 휴즈회로와 그내의 휴즈상태 검출회로를 갖는 반도체장치
KR20060006071A (ko) 퓨즈 및 형성 방법
US6108261A (en) Repair circuit for redundancy circuit with anti-fuse
US4592025A (en) Information storing circuit using blown and unblown fuses
US20020141273A1 (en) Address generating circuit
US6570806B2 (en) System and method for improving DRAM single cell fail fixability and flexibility repair at module level and universal laser fuse/anti-fuse latch therefor
US6020777A (en) Electrically programmable anti-fuse circuit
US6606264B2 (en) Programmable circuit and its method of operation
US7057941B2 (en) Three-state memory cell
US7403432B2 (en) Differential read-out circuit for fuse memory cells
US7482854B2 (en) E-fuse circuit using leakage current path of transistor
US7394713B2 (en) Fuse memory cell with improved protection against unauthorized access
US7352606B2 (en) Monotonic counter using memory cells
US20080062738A1 (en) Storage element and method for operating a storage element
JPH0219560B2 (https=)
US20040027877A1 (en) Method for setting the threshold voltage of a field-effect transistor, field-effect transistor and integrated circuit
JPH038039B2 (https=)
CN112309447A (zh) 存储装置以及写入方法
JPS58209157A (ja) 半導体記憶素子

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

St.27 status event code: A-2-2-Q10-Q13-nap-PG1605

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 14

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 15

FPAY Annual fee payment

Payment date: 20050110

Year of fee payment: 16

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 16

EXPY Expiration of term
PC1801 Expiration of term

St.27 status event code: N-4-6-H10-H14-oth-PC1801

Not in force date: 20050323

Ip right cessation event data comment text: Termination Category : EXPIRATION_OF_DURATION

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000