KR890016890A - 저융점 글라스를 사용하여 구성부품들을 접합하는 방법 - Google Patents

저융점 글라스를 사용하여 구성부품들을 접합하는 방법 Download PDF

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Publication number
KR890016890A
KR890016890A KR1019890004706A KR890004706A KR890016890A KR 890016890 A KR890016890 A KR 890016890A KR 1019890004706 A KR1019890004706 A KR 1019890004706A KR 890004706 A KR890004706 A KR 890004706A KR 890016890 A KR890016890 A KR 890016890A
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KR
South Korea
Prior art keywords
low melting
melting glass
component
glass layer
glass
Prior art date
Application number
KR1019890004706A
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English (en)
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KR0127308B1 (ko
Inventor
히데유끼 가와세
노보루 사하이
다모쯔 하즈메
시게오 미즈노
Original Assignee
스즈끼 데이이찌
닛본도구규도오고오 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 스즈끼 데이이찌, 닛본도구규도오고오 가부시기가이샤 filed Critical 스즈끼 데이이찌
Publication of KR890016890A publication Critical patent/KR890016890A/ko
Application granted granted Critical
Publication of KR0127308B1 publication Critical patent/KR0127308B1/ko

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Joining Of Glass To Other Materials (AREA)
  • Ceramic Products (AREA)

Abstract

내용 없음

Description

저융점 글라스를 사용하여 구성부푸들을 접합하는 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 서디프(cer-dip)와 같은 결합품의 횡단면도. 제 2 도는 은판에 적층된 저융점 글라스의 측단면도. 제 4 도는 특별 마스크의 평면도.

Claims (6)

  1. 저융점글라스에 의하여 두 구성부품을 접합하는 방법으로서, a)제 1 결합면을 갖는 접합할 제 1 구성부품을 마련하는 공정. (b) 외주테두리에 다수의 요부를 갖는 저융점글라스를 제 1 결합면에 적층시키는 공정. (c)상기 저융점 글라스층에 제 1 구성부품을.붙이는 공정. (d) 제1 및 제 2 구성 부품과 저융점글라스층을 상기 글라스의 융점이상의 온도로 가열하는 공정. (e) 상기 글라스를 고화시켜 제1 및 제 2 구성부품을 접합시키는 공정. 으로 구성되는 접합방법.
  2. 제 1 항에 있어서, 상기 요부가 상기 저융점 글라스층의 외주 테두리부근의 글라스층 두께를 감소시키는 접합방법.
  3. 제 1 항에 있어서, 상기 저융점글라스의 적층공정은 다스크부재로 상기 글라스층을 형성시키는 공정을 포함하며, 상기 마스크 부재는 상기 요부를 형성시키기 위해 배치된 적어도 하나의 돌기를 구비하는 접합방법.
  4. 제 1 항에 있어서, 제 1 구성부품은 세라믹부재이고, 제 2 구성부품은 금속부재인 접합방법.
  5. 제 4 항에 있어서, 상기 금속부재는 전기리드인 접합방법.
  6. 제 4 항에 있어서, 상기 금속부재는 IC칩을 수납하도록 배치되는 전기 도전파인 접합방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890004706A 1988-04-11 1989-04-10 저융점 글라스를 사용하여 구성부품들을 접합하는 방법 KR0127308B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP8854788A JP2656942B2 (ja) 1988-04-11 1988-04-11 低融点ガラス接着による接合体の製造方法，及び接着体
JP88-88547 1988-04-11
JP63-88547 1988-04-11

Publications (2)

Publication Number Publication Date
KR890016890A true KR890016890A (ko) 1989-11-30
KR0127308B1 KR0127308B1 (ko) 1998-04-06

Family

ID=13945880

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890004706A KR0127308B1 (ko) 1988-04-11 1989-04-10 저융점 글라스를 사용하여 구성부품들을 접합하는 방법

Country Status (5)

Country Link
US (1) US5006143A (ko)
JP (1) JP2656942B2 (ko)
KR (1) KR0127308B1 (ko)
GB (1) GB2222586B (ko)
SG (1) SG75692G (ko)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5200241A (en) * 1989-05-18 1993-04-06 General Electric Company Metal-ceramic structure with intermediate high temperature reaction barrier layer
FR2744843B1 (fr) * 1996-02-09 1998-04-10 Seb Sa Procede de realisation de connexion electrique par collage d'une cosse rigide sur une piste conductrice, cosse rigide pour la mise en oeuvre du procede et son application a une plaque chauffante pour recipient chauffant
US20030164006A1 (en) * 2001-10-26 2003-09-04 Buchanan Karl H. Direct bonding of glass articles for drawing
US6879039B2 (en) * 2001-12-18 2005-04-12 Broadcom Corporation Ball grid array package substrates and method of making the same
CN118020149A (zh) * 2021-09-27 2024-05-10 京瓷株式会社 光学部件搭载用封装体及光学装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3177576A (en) * 1961-08-15 1965-04-13 Rca Corp Method of photocell manufacture by simultaneously sintering the photosensitive material and sealing the cell
US3325586A (en) * 1963-03-05 1967-06-13 Fairchild Camera Instr Co Circuit element totally encapsulated in glass
US3560180A (en) * 1968-05-15 1971-02-02 Philco Ford Corp Glass metal sealing technique
US3669715A (en) * 1970-06-17 1972-06-13 Sylvania Electric Prod Method of preparing a metal part to be sealed in a glass-ceramic composite
US3768991A (en) * 1972-06-14 1973-10-30 Diacon Method for sealing an enclosure for an electronic component
JPS52103435A (en) * 1976-02-27 1977-08-30 Hitachi Ltd Bonding of two objects with aid of low-melting glass
JPS60195163U (ja) * 1984-06-05 1985-12-26 アルプス電気株式会社 板状半田
DE3520085A1 (de) * 1985-06-05 1986-12-11 Philips Patentverwaltung Gmbh, 2000 Hamburg Verfahren zum herstellen eines hermetisch verschlossenen bauelementengehaeuses, insbesondere fuer schwingquarze

Also Published As

Publication number Publication date
JPH01261247A (ja) 1989-10-18
SG75692G (en) 1992-10-02
US5006143A (en) 1991-04-09
GB2222586A (en) 1990-03-14
GB2222586B (en) 1992-01-15
KR0127308B1 (ko) 1998-04-06
GB8908054D0 (en) 1989-05-24
JP2656942B2 (ja) 1997-09-24

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