KR840006563A - 반도체 장치 및 제조방법 - Google Patents

반도체 장치 및 제조방법 Download PDF

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KR840006563A
KR840006563A KR1019830004421A KR830004421A KR840006563A KR 840006563 A KR840006563 A KR 840006563A KR 1019830004421 A KR1019830004421 A KR 1019830004421A KR 830004421 A KR830004421 A KR 830004421A KR 840006563 A KR840006563 A KR 840006563A
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silicon
primary
film
semiconductor device
silicon nitride
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KR860001586B1 (ko
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고또히로시
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야마모도 다꾸마
후지쓰 가부시끼가이샤
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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
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    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
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    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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  • Microelectronics & Electronic Packaging (AREA)
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  • Bipolar Transistors (AREA)

Abstract

내용 없음

Description

반도체 장치 및 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래 방법으로 조립된 자동조정트랜지스터 일부의 단면 개락도.
제2도는 본 발명에 의해 개량된 트랜지스터의 상응하는 부분의 단면 개락도.
제3도는 상응하는 일부분의 단면도로서 (a)부터 (i)까지의 순서로 본 발명에 따라 개량된 트랜지스터의 조립순서도.

Claims (13)

  1. (가) 베이스 접촉부와
    (나) 이 베이스 접촉부에 연결된 능동형 베이스부와,
    (다) 이 능동형 베이스부에 구성된 이미터와
    (라) 베이스 접촉부에 구성된 다결정질 실리콘으로된 베이스 접촉 전극과
    (마) 기질 표면상에 있는 베이스-이미터 접점 주변부를 피복하는 질화규소막으로된 반도체장치에 있어서 다경정질 실리콘 베이스 접점의 산화된 측에 의해 베이스와 이미터를 서로 격리시키고 산화물층을 질화규소막 위에서 경계를 이루도록 하여서된 반도체 장치 및 제조 방법.
  2. 청구 범위 제1항에 있어서 베이스 접점을 자동 조정된 베이스 접촉부로 한 반도체 장치 및 제조방법.
  3. 청구 범위 제1항에 있어서 능동형 베이스부를 자동 조정된 능동형 베이스부로한 반도체 장치 및 제조방법.
  4. 청구 범위 제1항에 있어서 이미터를 자동 조정된 이미터로 한반도체 장치 및 제조방법.
  5. 청구 범위 제1항에 있어서 이미터를 자동 조정된 이미터로 한 반도체 장치 및 제조방법.
  6. 청구 범위 제1항에 있어서 자동 조정된 트랜지스터로 한 반도체 장치 및 제조방법.
  7. 청구 범위 제1항부터 제5항까지에 있어서 실리콘 트랜지스터로 한 반도체 장치 및 제조방법.
  8. 열 처리에 의해 산화된 실리콘 다결정막에 의하여 다결정실리콘으로된 베이스 접점물질과 격리된 이미터를 가진 반도체 장치를 구성함에 있어서
    (가) 1차 질화규소를 이용하여 1차 전도도형 반도체기질 표면을 코우팅하고,
    (나) 1차 질화규소필름 표면에는 1차 이산화 규소막과 2차 질화규소막을 순서대로 적층시키고,
    (다) 2차 질화규소막의 패턴을 형성시켜 이 패턴의 바깥부분에 1차 이산화규소막을 노출시키고,
    (라) 노출된 1차 이산화규소막을 부식처리하여 2차 질화규소막 패턴외부에 1차 질화규소막을 노출시킴과 동시에 2차 질화규소막 패턴아래에 있는 1차 이산화 규소막내에 부식처리된 부분을 형성하고,
    (마) 2차 질화규소막 패턴 외부에 노출된 1차 질화규소막을 선택적으로 부식처리해내고,
    (바) 2차 질화규소 패턴 외부에 노출된 1차 질화규소막 표면과 2차 질화규소 패턴 표면에 고도로 도우핑된 2차 전도도형 다결정질 실리콘을 형성하며,
    (사) 1차 이산화규소막을 부식처리함과 동시에 2차 질화규소 패턴과 다결정질 실리콘막을 위에 형성시키고,
    (아) 반도체기질 표면에 잔존하는 다결정질 실리콘막 표면에 열에 의해 산화된 이산화규소막을 형성시킴과 동시에 다결정질 실리콘막내 포함된 2차형 전도성 불순물을 1차 전도도형 반도체 기질속으로 확산시킴으로써 2차 전도도형 반도체 물질로된 베이스 접촉부를 구성하고,
    (자) 이온주입(注入)에 의해 1차 질화규소막을 통해 1차형 반도체 물질속으로 2차 전도도형 불순물을 선택적으로 주입시키며, 이때 열에 의해 안정화시킨 이산화 규소막이 있는 실리콘 다결정막을 매스크로 사용하고,
    (차) 이산화규소막이 있는 실리콘 다결정막으로 부터 노출되어 있는 1차 질화 규소막을 선택적으로 부식처리해서 제거하고,
    (카) 이차 전도도형 분순물이 주입된 부분속으로 이온 주입에 의해 1차 전도도형 불순물을 선택적으로 주입시키며, 이때 열에 의해 안정화시킨 이산화규소막이 있는 실리콘 다결정막을 매스크로 사용하고,
    (타) 이온 주입된 1차 및 2차 전도도형 불순물을 열처리에 의해 아닐링하여 2차 전도도형의 능동형 베이스부와 1차 전도도형의 이미터부를 각각 형성시키는 공정으로된 반도체 장치 및 제조방법.
  9. 청구범위 제7항에 있어서 (가) 공정을 직접 질화법 단계로한 반도체 장치 및 제조방법.
  10. 청구범위 제7항에 있어서 (나) 공정을 화학 증착법 단계로한 반도체 장치 및 제조방법.
  11. 청구범위 제7항에 있어서 (바) 공정을 실리콘 다결정의 증발공정 또는 스퍼터링공정으로한 반도체 장치 및 제조방법.
  12. 청구범위 제7항에 있어서 (아) 공정에 의해 베이스 접촉부를 형성하는 공정을 고체간 확산 공정으로 한 반도체 장치 및 제조방법.
  13. 청구범위 제7항에서부터 제10까지에 있어서 반도체기질로 실리콘기질을 사용한 반도체 장치 및 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019830004421A 1982-10-22 1983-09-20 반도체장치 및 제조방법 KR860001586B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP57185510A JPS5975661A (ja) 1982-10-22 1982-10-22 半導体装置及びその製造方法
JP185510 1982-10-22

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KR840006563A true KR840006563A (ko) 1984-11-30
KR860001586B1 KR860001586B1 (ko) 1986-10-10

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EP (1) EP0109766B1 (ko)
JP (1) JPS5975661A (ko)
KR (1) KR860001586B1 (ko)
CA (1) CA1192668A (ko)
DE (1) DE3368813D1 (ko)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257570A (ja) * 1984-06-04 1985-12-19 Rohm Co Ltd 半導体装置の製造方法
NL8402856A (nl) * 1984-09-18 1986-04-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
JPH0654776B2 (ja) * 1985-01-17 1994-07-20 松下電子工業株式会社 半導体装置の製造方法
KR900001034A (ko) * 1988-06-27 1990-01-31 야마무라 가쯔미 반도체장치
JPH11260734A (ja) * 1998-03-12 1999-09-24 Nec Corp 半導体装置の製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3597667A (en) * 1966-03-01 1971-08-03 Gen Electric Silicon oxide-silicon nitride coatings for semiconductor devices
GB1192144A (en) * 1967-10-02 1970-05-20 Hitachi Ltd Semiconductor Device and Manufacturing Method thereof
US4157269A (en) * 1978-06-06 1979-06-05 International Business Machines Corporation Utilizing polysilicon diffusion sources and special masking techniques
JPS592583B2 (ja) * 1979-11-21 1984-01-19 新日本製鐵株式会社 高合金特殊アダマイトロ−ルの製造方法
JPS5866358A (ja) * 1981-05-12 1983-04-20 Nec Corp 半導体装置の製法
JPS57186360A (en) * 1981-05-13 1982-11-16 Hitachi Ltd Semiconductor device

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KR860001586B1 (ko) 1986-10-10
JPS5975661A (ja) 1984-04-28
EP0109766B1 (en) 1986-12-30
CA1192668A (en) 1985-08-27
DE3368813D1 (en) 1987-02-05

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