KR840005918A - 반도체 장치의 기판구조 및 그 제조방법 - Google Patents

반도체 장치의 기판구조 및 그 제조방법

Info

Publication number
KR840005918A
KR840005918A KR1019830003959A KR830003959A KR840005918A KR 840005918 A KR840005918 A KR 840005918A KR 1019830003959 A KR1019830003959 A KR 1019830003959A KR 830003959 A KR830003959 A KR 830003959A KR 840005918 A KR840005918 A KR 840005918A
Authority
KR
South Korea
Prior art keywords
manufacturing
semiconductor device
substrate structure
substrate
semiconductor
Prior art date
Application number
KR1019830003959A
Other languages
English (en)
Other versions
KR880000975B1 (ko
Inventor
가즈히도 사꾸마
요시노부 아리다
노부요시 아와야
마사아끼 사또우
Original Assignee
니혼덴싱뎅와 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP57145471A external-priority patent/JPS5935445A/ja
Priority claimed from JP58152482A external-priority patent/JPS6045037A/ja
Application filed by 니혼덴싱뎅와 가부시끼가이샤 filed Critical 니혼덴싱뎅와 가부시끼가이샤
Publication of KR840005918A publication Critical patent/KR840005918A/ko
Application granted granted Critical
Publication of KR880000975B1 publication Critical patent/KR880000975B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Element Separation (AREA)
KR1019830003959A 1982-08-24 1983-08-24 반도체 장치의 기판구조 및 그 제조방법 KR880000975B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP145471 1982-08-24
JP57145471A JPS5935445A (ja) 1982-08-24 1982-08-24 半導体装置の製造方法
JP58152482A JPS6045037A (ja) 1983-08-23 1983-08-23 半導体装置の基板構造およびその製造方法
JP152482 1983-08-23

Publications (2)

Publication Number Publication Date
KR840005918A true KR840005918A (ko) 1984-11-19
KR880000975B1 KR880000975B1 (ko) 1988-06-07

Family

ID=26476568

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019830003959A KR880000975B1 (ko) 1982-08-24 1983-08-24 반도체 장치의 기판구조 및 그 제조방법

Country Status (3)

Country Link
EP (1) EP0104765B1 (ko)
KR (1) KR880000975B1 (ko)
DE (1) DE3380104D1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6088468A (ja) * 1983-10-13 1985-05-18 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 半導体集積装置の製造方法
US4571819A (en) * 1984-11-01 1986-02-25 Ncr Corporation Method for forming trench isolation structures
IT1200725B (it) * 1985-08-28 1989-01-27 Sgs Microelettronica Spa Struttura di isolamento in dispositivi mos e procedimento di preparazione della stessa
EP0226517A3 (en) * 1985-12-18 1989-10-18 Fairchild Semiconductor Corporation Method for isolating regions of different impurity concentrations in a semiconductor substrate
US5256592A (en) * 1989-10-20 1993-10-26 Oki Electric Industry Co., Ltd. Method for fabricating a semiconductor integrated circuit device
US5240512A (en) * 1990-06-01 1993-08-31 Texas Instruments Incorporated Method and structure for forming a trench within a semiconductor layer of material
US5120675A (en) * 1990-06-01 1992-06-09 Texas Instruments Incorporated Method for forming a trench within a semiconductor layer of material
JP6270706B2 (ja) * 2014-12-11 2018-01-31 トヨタ自動車株式会社 半導体装置とその製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4269636A (en) * 1978-12-29 1981-05-26 Harris Corporation Method of fabricating self-aligned bipolar transistor process and device utilizing etching and self-aligned masking
US4331708A (en) * 1980-11-04 1982-05-25 Texas Instruments Incorporated Method of fabricating narrow deep grooves in silicon

Also Published As

Publication number Publication date
EP0104765B1 (en) 1989-06-21
EP0104765A3 (en) 1986-07-09
EP0104765A2 (en) 1984-04-04
KR880000975B1 (ko) 1988-06-07
DE3380104D1 (en) 1989-07-27

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