KR840001728A - 마이크로 프로세서 - Google Patents
마이크로 프로세서 Download PDFInfo
- Publication number
- KR840001728A KR840001728A KR1019820004268A KR820004268A KR840001728A KR 840001728 A KR840001728 A KR 840001728A KR 1019820004268 A KR1019820004268 A KR 1019820004268A KR 820004268 A KR820004268 A KR 820004268A KR 840001728 A KR840001728 A KR 840001728A
- Authority
- KR
- South Korea
- Prior art keywords
- data
- storage device
- instruction
- storage
- address
- Prior art date
Links
- 230000003139 buffering effect Effects 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 230000004044 response Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/355—Indexed addressing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
- Complex Calculations (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 바람직한 실시예의 블록도,
제2a도는 바람직한 실시예의 어드레스버스 및 명령데이터버스에 명령 및 데이터의 인터리이빙, 그들의 어드레스 및 그들의 출현타이밍 관계의 예시도,
제2b도는 버스 중재자로서 역할을 하는 IRS- 1.5신호의 동작 예시도, 제2c도는 제2도의 다른 동작에 관련된 해독기 입력의 타이밍 예시도,
제2d도는 제2도의 다른 동작에 관련된 해독기 출력의 타이밍 및 DAB버퍼의 로우딩타이밍 예시도,
제2e도는 명령레지스터, 실행레지스터 및 X레지스터 내용의 타이밍 및 위치와, IRSO 제어신호의 예시도.
Claims (5)
- 기억장치가 프로그램카운터수단 또는 데이터 어드레스에 의하여 번지 지정될 수 있으며 그것에 응하여 각각 연산논리장치에 의해서 수행될 동작(operation)을 지시하는 정보를 포함하는 명령 또는 상기 연산논리장치에 의해 연산될 데이터를 발생하는 마이크로 프로세서에 있어서, 상기 기억장치에 존재하는 명령 어드레스 및 데이터 어드레스를 인터리이브(interleave)하며 어떤 낭비된 타임 슬로트(slot)도 발생하지 않으며 명령 및 대응 데이터가 실행시간에 상기 연산논리장치에 도착하도록 상기 기억장치로부터 명령 및 데이터를 인터리이브하는 수단을 포함하는 것을 특징으로 하는 마이크로 프로세서.
- 마이크로 프로세서의 기억장치 억세스(access)를 인터리이브하는 방법에 있어서, 만약 요구된 경우에는 명령(N+K)(K는 파이프라인지연에 의해 결정됨)의 인출후 즉시 명령(N)에 대한 데이터 슬로트를 발생하는 단계와 각 데이타슬로트 발생후 즉시 명령을 인출하는 단계로 이루어지는 것을 특징으로 하는 기억장치 억세스를 인터리이브하는 방법.
- 마이크로 프로세서에 있어서, 기억장치에 데이터 어드레스를 버퍼링(buffering)하는 수단과, 상기 기억장치로부터 출력된 다수의 명령을 기억하는 수단, 및 상기 버퍼링수단과, 기억수단과 상기 기억의 치에 명령어드레스와 데이터 어드레스 신청을 제어하는 수단을 포함하는 것을 특징으로 하는 마이크로 프로세서.
- 데이터 및 명령을 기억하는 기억장치와, 상기 기억장치에 명령 어드레스를 공급하는 프로그램 카 수단과, 상기 기억장치에 기억어드레스를 공급하는 수단과, 명령에 응답하는 데이터에 따라 연산동작을 실행하여 명령에 응답하는 수단과, 다수의 명령을 기억하며 연산동작을 실행하는 상기 수단에 기억내용을 공급하는 수단, 및 데이터 어드레스 또는 명령어드레스가 상기 기억장치에 인가되는 것을 제어하며 상기 연산동작을 실행하는 수단과 명령의 도착을 적당한 데이터와 동기시키도록 상기 명령기억수단을 제어하는 제어수단을 포함하는 것을 특징으로 하는 마이크로 프로세서.
- ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US304,017 | 1981-09-21 | ||
US06/304,017 US4541045A (en) | 1981-09-21 | 1981-09-21 | Microprocessor architecture employing efficient operand and instruction addressing |
US81-304017 | 1981-09-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR840001728A true KR840001728A (ko) | 1984-05-16 |
KR880001170B1 KR880001170B1 (ko) | 1988-07-02 |
Family
ID=23174672
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR8204268A KR880001170B1 (ko) | 1981-09-21 | 1982-09-21 | 마이크로 프로세서 |
Country Status (11)
Country | Link |
---|---|
US (1) | US4541045A (ko) |
JP (1) | JPS58501560A (ko) |
KR (1) | KR880001170B1 (ko) |
AR (1) | AR230712A1 (ko) |
BE (1) | BE894457A (ko) |
CA (1) | CA1180455A (ko) |
FR (1) | FR2513410B1 (ko) |
GB (1) | GB2116339B (ko) |
IT (1) | IT1155933B (ko) |
NZ (1) | NZ201809A (ko) |
WO (1) | WO1983001133A1 (ko) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4719592A (en) * | 1982-11-20 | 1988-01-12 | International Computers Limited | Sequence generator |
US4613935A (en) * | 1983-02-02 | 1986-09-23 | Couleur John F | Method and apparatus for pipe line processing with a single arithmetic logic unit |
JPH0776917B2 (ja) * | 1984-12-29 | 1995-08-16 | ソニー株式会社 | マイクロコンピユ−タ |
JPS6282402A (ja) * | 1985-10-07 | 1987-04-15 | Toshiba Corp | シ−ケンス制御装置 |
JPS62152043A (ja) * | 1985-12-26 | 1987-07-07 | Nec Corp | 命令コ−ドアクセス制御方式 |
EP0256134B1 (en) * | 1986-01-27 | 1991-12-18 | Fujitsu Limited | Central processing unit |
US4780883A (en) * | 1986-06-26 | 1988-10-25 | Racal Data Communications Inc. | Data modem with adaptive synchronized speed change |
US4797817A (en) * | 1986-12-10 | 1989-01-10 | Ncr Corporation | Single cycle store operations in a virtual memory |
JP2695157B2 (ja) * | 1986-12-29 | 1997-12-24 | 松下電器産業株式会社 | 可変パイプラインプロセッサ |
US5251322A (en) * | 1987-08-13 | 1993-10-05 | Digital Equipment Corporation | Method of operating a computer graphics system including asynchronously traversing its nodes |
US5097411A (en) * | 1987-08-13 | 1992-03-17 | Digital Equipment Corporation | Graphics workstation for creating graphics data structure which are stored retrieved and displayed by a graphics subsystem for competing programs |
US5235684A (en) * | 1988-06-30 | 1993-08-10 | Wang Laboratories, Inc. | System bus having multiplexed command/id and data |
US5123097A (en) * | 1989-01-05 | 1992-06-16 | Bull Hn Information Systems Inc. | Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy |
US5109497A (en) * | 1989-01-27 | 1992-04-28 | Hughes Aircraft Company | Arithmetic element controller for controlling data, control and micro store memories |
US5440749A (en) * | 1989-08-03 | 1995-08-08 | Nanotronics Corporation | High performance, low cost microprocessor architecture |
US7124281B1 (en) * | 2000-09-21 | 2006-10-17 | Freescale Semiconductor, Inc. | Processing system having sequential address indicator signals |
US7493607B2 (en) | 2002-07-09 | 2009-02-17 | Bluerisc Inc. | Statically speculative compilation and execution |
US20050114850A1 (en) | 2003-10-29 | 2005-05-26 | Saurabh Chheda | Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control |
US7996671B2 (en) | 2003-11-17 | 2011-08-09 | Bluerisc Inc. | Security of program executables and microprocessors based on compiler-architecture interaction |
US8607209B2 (en) | 2004-02-04 | 2013-12-10 | Bluerisc Inc. | Energy-focused compiler-assisted branch prediction |
US7430642B2 (en) * | 2005-06-10 | 2008-09-30 | Freescale Semiconductor, Inc. | System and method for unified cache access using sequential instruction information |
US20080126766A1 (en) | 2006-11-03 | 2008-05-29 | Saurabh Chheda | Securing microprocessors against information leakage and physical tampering |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL276236A (ko) * | 1961-03-24 | |||
US3409879A (en) * | 1966-03-30 | 1968-11-05 | Bell Telephone Labor Inc | Computer organization employing plural operand storage |
US3449724A (en) * | 1966-09-12 | 1969-06-10 | Ibm | Control system for interleave memory |
US3462744A (en) * | 1966-09-28 | 1969-08-19 | Ibm | Execution unit with a common operand and resulting bussing system |
US3699530A (en) * | 1970-12-30 | 1972-10-17 | Ibm | Input/output system with dedicated channel buffering |
US3820079A (en) * | 1971-11-01 | 1974-06-25 | Hewlett Packard Co | Bus oriented,modular,multiprocessing computer |
GB1448866A (en) * | 1973-04-13 | 1976-09-08 | Int Computers Ltd | Microprogrammed data processing systems |
US4050058A (en) * | 1973-12-26 | 1977-09-20 | Xerox Corporation | Microprocessor with parallel operation |
US3906453A (en) * | 1974-03-27 | 1975-09-16 | Victor Comptometer Corp | Care memory control circuit |
US4153932A (en) * | 1974-03-29 | 1979-05-08 | Massachusetts Institute Of Technology | Data processing apparatus for highly parallel execution of stored programs |
JPS605978B2 (ja) * | 1974-09-12 | 1985-02-15 | 富士通株式会社 | 記憶装置のアクセス制御方式 |
CA1059639A (en) * | 1975-03-26 | 1979-07-31 | Garvin W. Patterson | Instruction look ahead having prefetch concurrency and pipe line features |
US4041461A (en) * | 1975-07-25 | 1977-08-09 | International Business Machines Corporation | Signal analyzer system |
JPS6055849B2 (ja) * | 1975-12-04 | 1985-12-06 | 株式会社東芝 | 命令制御方式 |
DE2555963C2 (de) * | 1975-12-12 | 1982-10-28 | Ibm Deutschland Gmbh, 7000 Stuttgart | Einrichtung zur Funktionsmodifizierung |
GB1506972A (en) * | 1976-02-06 | 1978-04-12 | Int Computers Ltd | Data processing systems |
US4062058A (en) * | 1976-02-13 | 1977-12-06 | The United States Of America As Represented By The Secretary Of The Navy | Next address subprocessor |
US4095265A (en) * | 1976-06-07 | 1978-06-13 | International Business Machines Corporation | Memory control structure for a pipelined mini-processor system |
US4313160A (en) * | 1976-08-17 | 1982-01-26 | Computer Automation, Inc. | Distributed input/output controller system |
GB1527289A (en) * | 1976-08-17 | 1978-10-04 | Int Computers Ltd | Data processing systems |
US4089052A (en) * | 1976-12-13 | 1978-05-09 | Data General Corporation | Data processing system |
US4065810A (en) * | 1977-01-26 | 1977-12-27 | International Business Machines Corporation | Data transfer system |
US4149245A (en) * | 1977-06-09 | 1979-04-10 | International Business Machines Corporation | High speed store request processing control |
US4210960A (en) * | 1977-09-02 | 1980-07-01 | Sperry Corporation | Digital computer with overlapped operation utilizing conditional control to minimize time losses |
JPS5454536A (en) * | 1977-10-08 | 1979-04-28 | Fujitsu Ltd | Data processor |
US4164787A (en) * | 1977-11-09 | 1979-08-14 | Bell Telephone Laboratories, Incorporated | Multiple microprocessor intercommunication arrangement |
US4298933A (en) * | 1978-07-08 | 1981-11-03 | Tokyo Shibaura Denki Kabushiki Kaisha | Data-processing device including means to suppress the execution of unnecessary instructions |
JPS6024985B2 (ja) * | 1978-08-31 | 1985-06-15 | 富士通株式会社 | デ−タ処理方式 |
US4236205A (en) * | 1978-10-23 | 1980-11-25 | International Business Machines Corporation | Access-time reduction control circuit and process for digital storage devices |
US4320453A (en) * | 1978-11-02 | 1982-03-16 | Digital House, Ltd. | Dual sequencer microprocessor |
US4325120A (en) * | 1978-12-21 | 1982-04-13 | Intel Corporation | Data processing system |
US4282572A (en) * | 1979-01-15 | 1981-08-04 | Ncr Corporation | Multiprocessor memory access system |
CA1134952A (en) * | 1979-04-24 | 1982-11-02 | Thomas E. Kloos | Means and method within a digital processing system for prefetching both operation codes and operands |
NL7906416A (nl) * | 1979-08-27 | 1981-03-03 | Philips Nv | Rekenmachinesysteem, waarbij het programmageheugen geschikt is om doorlopen te worden waarbij niet tot een instruktie behorende gegevens apart gedetekteerd worden. |
US4298936A (en) * | 1979-11-15 | 1981-11-03 | Analogic Corporation | Array Processor |
US4373182A (en) * | 1980-08-19 | 1983-02-08 | Sperry Corporation | Indirect address computation circuit |
US4399507A (en) * | 1981-06-30 | 1983-08-16 | Ibm Corporation | Instruction address stack in the data memory of an instruction-pipelined processor |
-
1981
- 1981-09-21 US US06/304,017 patent/US4541045A/en not_active Expired - Lifetime
-
1982
- 1982-09-03 NZ NZ201809A patent/NZ201809A/en unknown
- 1982-09-07 CA CA000410913A patent/CA1180455A/en not_active Expired
- 1982-09-17 WO PCT/US1982/001264 patent/WO1983001133A1/en active Application Filing
- 1982-09-17 JP JP57503026A patent/JPS58501560A/ja active Pending
- 1982-09-17 GB GB08312020A patent/GB2116339B/en not_active Expired
- 1982-09-20 FR FR8215793A patent/FR2513410B1/fr not_active Expired
- 1982-09-20 IT IT68114/82A patent/IT1155933B/it active
- 1982-09-21 KR KR8204268A patent/KR880001170B1/ko active
- 1982-09-21 AR AR290717A patent/AR230712A1/es active
- 1982-09-21 BE BE0/209066A patent/BE894457A/fr unknown
Also Published As
Publication number | Publication date |
---|---|
GB2116339A (en) | 1983-09-21 |
JPS58501560A (ja) | 1983-09-16 |
BE894457A (fr) | 1983-01-17 |
IT1155933B (it) | 1987-01-28 |
US4541045A (en) | 1985-09-10 |
AR230712A1 (es) | 1984-05-31 |
CA1180455A (en) | 1985-01-02 |
KR880001170B1 (ko) | 1988-07-02 |
NZ201809A (en) | 1985-12-13 |
GB2116339B (en) | 1985-11-20 |
GB8312020D0 (en) | 1983-06-08 |
WO1983001133A1 (en) | 1983-03-31 |
IT8268114A0 (it) | 1982-09-20 |
FR2513410A1 (fr) | 1983-03-25 |
FR2513410B1 (fr) | 1988-10-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR840001728A (ko) | 마이크로 프로세서 | |
US4780819A (en) | Emulator system utilizing a program counter and a latch coupled to an emulator memory for reducing fletch line of instructions stored in the emulator memory | |
KR940012147A (ko) | 마이크로컴퓨터 시스템 | |
KR840008069A (ko) | 디지탈 콘트로울러 | |
JPH0248931B2 (ko) | ||
KR970705080A (ko) | 외부 메모리로의 액세스 요청을 파이프라이닝하는 마이크로프로세서(Microprocessor with Pipelined Access Request to External Memory) | |
KR930002935A (ko) | 정보 처리 장치 | |
US3961313A (en) | Computer control apparatus | |
US4740892A (en) | Microcomputer having peripheral functions | |
JPS60205760A (ja) | メモリ制御装置 | |
JP2002278774A (ja) | プロセッサ内の機能単位の制御時に命令語を生成する方法と装置 | |
KR900005306A (ko) | 회복시간을 설정하기 위한 방법 및 컴퓨터 시스템 | |
JP2619425B2 (ja) | シーケンスコントローラ | |
JP3043341B2 (ja) | マイクロコンピュータシステム | |
JP2747353B2 (ja) | アドレス発生装置 | |
JP2000029508A (ja) | プログラマブルコントローラ | |
JP2581214B2 (ja) | 論理シミュレータ | |
KR960018958A (ko) | 다중 프로세서 시스템에서 아토믹 명령어 수행시 데이타 버퍼를 사용한 메인 메모리 액세스 장치 | |
JPS6014335A (ja) | 情報処理装置 | |
JPH0652044A (ja) | マイクロプロセッサ | |
JPH0769797B2 (ja) | マイクロコンピュータシステム | |
JPH0516611B2 (ko) | ||
JPS62168235A (ja) | デ−タ処理装置 | |
JPH07302219A (ja) | データプロセッサ及びデータ処理方法 | |
JPH0243626A (ja) | コンピュータ・プロセッサの実行速度を制御する装置 |