KR20150069548A - 반도체 적층 구조체들을 형성하는 방법들 및 시스템들 - Google Patents

반도체 적층 구조체들을 형성하는 방법들 및 시스템들 Download PDF

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Publication number
KR20150069548A
KR20150069548A KR1020140179232A KR20140179232A KR20150069548A KR 20150069548 A KR20150069548 A KR 20150069548A KR 1020140179232 A KR1020140179232 A KR 1020140179232A KR 20140179232 A KR20140179232 A KR 20140179232A KR 20150069548 A KR20150069548 A KR 20150069548A
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KR
South Korea
Prior art keywords
component
semiconductor
segmental
direct
direct bonding
Prior art date
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Withdrawn
Application number
KR1020140179232A
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English (en)
Korean (ko)
Inventor
존 에프. 스텀프
Original Assignee
램 리써치 코포레이션
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Application filed by 램 리써치 코포레이션 filed Critical 램 리써치 코포레이션
Publication of KR20150069548A publication Critical patent/KR20150069548A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68707—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a robot blade, or gripped by a gripper for conveyance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Robotics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Laser Beam Processing (AREA)
KR1020140179232A 2013-12-13 2014-12-12 반도체 적층 구조체들을 형성하는 방법들 및 시스템들 Withdrawn KR20150069548A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/105,566 2013-12-13
US14/105,566 US9070745B1 (en) 2013-12-13 2013-12-13 Methods and systems for forming semiconductor laminate structures

Publications (1)

Publication Number Publication Date
KR20150069548A true KR20150069548A (ko) 2015-06-23

Family

ID=53369386

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020140179232A Withdrawn KR20150069548A (ko) 2013-12-13 2014-12-12 반도체 적층 구조체들을 형성하는 방법들 및 시스템들

Country Status (6)

Country Link
US (1) US9070745B1 (enExample)
JP (1) JP6465633B2 (enExample)
KR (1) KR20150069548A (enExample)
CN (1) CN104716021B (enExample)
SG (1) SG10201407521YA (enExample)
TW (1) TWI657479B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9937589B2 (en) * 2015-03-27 2018-04-10 Advanced Research For Manufacturing Systems, Llc Object manufacturing from a work piece made of separate components
CN111403324B (zh) * 2018-10-23 2021-03-12 长江存储科技有限责任公司 半导体器件翻转装置
US10903050B2 (en) 2018-12-10 2021-01-26 Lam Research Corporation Endpoint sensor based control including adjustment of an edge ring parameter for each substrate processed to maintain etch rate uniformity
CN114043074B (zh) * 2021-11-25 2024-05-03 哈尔滨工业大学 一种具有柔性加工能力的小型水导激光加工系统及方法
CN114346474B (zh) * 2022-01-17 2023-05-16 博捷芯(深圳)半导体有限公司 一种全自动激光晶圆切割装置及切割方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020115263A1 (en) * 2001-02-16 2002-08-22 Worth Thomas Michael Method and related apparatus of processing a substrate
JP2003257807A (ja) * 2002-03-07 2003-09-12 Shin Etsu Chem Co Ltd シリコン加工品の製造方法およびシリコン加工品
US6822326B2 (en) * 2002-09-25 2004-11-23 Ziptronix Wafer bonding hermetic encapsulation
JP4128843B2 (ja) * 2002-10-16 2008-07-30 古河電気工業株式会社 半導体チップ製造方法
JP4417028B2 (ja) * 2003-05-22 2010-02-17 株式会社タカトリ ダイシングフレームへのダイシングテープの貼り付け装置
CN100548692C (zh) * 2003-10-10 2009-10-14 富士胶卷迪马蒂克斯股份有限公司 具有薄膜的打印头
JP2006332378A (ja) * 2005-05-26 2006-12-07 Sharp Corp 物品の位置決め方法および位置決め装置、並びに半導体装置の製造方法および半導体装置の製造装置
EP1894662A2 (en) * 2006-08-29 2008-03-05 Nitto Denko Corporation Adhesive sheet for water jet laser dicing
JP2008153349A (ja) * 2006-12-15 2008-07-03 Disco Abrasive Syst Ltd ウェーハの分割方法
JP2010519763A (ja) * 2007-02-22 2010-06-03 ハナ シリコン アイエヌシー プラズマ処理装置用シリコン素材の製造方法
JP2009212173A (ja) * 2008-03-03 2009-09-17 Csun Mfg Ltd ウエハフィルム裁断装置
JP2011088799A (ja) * 2009-10-26 2011-05-06 Mitsubishi Electric Corp 半導体装置の製造方法およびレーザー加工装置
FR2954585B1 (fr) * 2009-12-23 2012-03-02 Soitec Silicon Insulator Technologies Procede de realisation d'une heterostructure avec minimisation de contrainte
JP5578911B2 (ja) * 2010-03-31 2014-08-27 古河電気工業株式会社 ウエハ加工用テープ
CN102373017A (zh) * 2010-08-19 2012-03-14 古河电气工业株式会社 晶片加工用胶带
JP5952550B2 (ja) * 2011-11-28 2016-07-13 株式会社半導体エネルギー研究所 貼り合わせ装置

Also Published As

Publication number Publication date
US9070745B1 (en) 2015-06-30
SG10201407521YA (en) 2015-07-30
JP2015122490A (ja) 2015-07-02
JP6465633B2 (ja) 2019-02-06
TW201543535A (zh) 2015-11-16
US20150170958A1 (en) 2015-06-18
CN104716021B (zh) 2019-04-09
TWI657479B (zh) 2019-04-21
CN104716021A (zh) 2015-06-17

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20141212

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid