KR20100137356A - 바이폴라 트랜지스터 구조 및 에미터-베이스 인터페이스 불순물 포함 방법 - Google Patents
바이폴라 트랜지스터 구조 및 에미터-베이스 인터페이스 불순물 포함 방법 Download PDFInfo
- Publication number
- KR20100137356A KR20100137356A KR1020100047579A KR20100047579A KR20100137356A KR 20100137356 A KR20100137356 A KR 20100137356A KR 1020100047579 A KR1020100047579 A KR 1020100047579A KR 20100047579 A KR20100047579 A KR 20100047579A KR 20100137356 A KR20100137356 A KR 20100137356A
- Authority
- KR
- South Korea
- Prior art keywords
- bipolar transistor
- impurity
- transistor structure
- emitter
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/50—Physical imperfections
- H10D62/57—Physical imperfections the imperfections being on the surface of the semiconductor body, e.g. the body having a roughened surface
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/854—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs further characterised by the dopants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/86—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group II-VI materials, e.g. ZnO
- H10D62/864—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group II-VI materials, e.g. ZnO further characterised by the dopants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
- H10D62/138—Pedestal collectors
Landscapes
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/488,899 | 2009-06-22 | ||
| US12/488,899 US8482101B2 (en) | 2009-06-22 | 2009-06-22 | Bipolar transistor structure and method including emitter-base interface impurity |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20100137356A true KR20100137356A (ko) | 2010-12-30 |
Family
ID=43353532
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020100047579A Withdrawn KR20100137356A (ko) | 2009-06-22 | 2010-05-20 | 바이폴라 트랜지스터 구조 및 에미터-베이스 인터페이스 불순물 포함 방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8482101B2 (enExample) |
| JP (1) | JP5704844B2 (enExample) |
| KR (1) | KR20100137356A (enExample) |
| CN (1) | CN101930998A (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9761701B2 (en) | 2014-05-01 | 2017-09-12 | Infineon Technologies Ag | Bipolar transistor |
| US10916642B2 (en) | 2019-04-18 | 2021-02-09 | Globalfoundries U.S. Inc. | Heterojunction bipolar transistor with emitter base junction oxide interface |
| US11862717B2 (en) | 2021-08-24 | 2024-01-02 | Globalfoundries U.S. Inc. | Lateral bipolar transistor structure with superlattice layer and method to form same |
| US20230352570A1 (en) * | 2022-04-29 | 2023-11-02 | Globalfoundries U.S. Inc. | Bipolar junction transistor |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6815303B2 (en) | 1998-04-29 | 2004-11-09 | Micron Technology, Inc. | Bipolar transistors with low-resistance emitter contacts |
| GB9907184D0 (en) * | 1999-03-30 | 1999-05-26 | Philips Electronics Nv | A method of manufacturing a semiconductor device |
| FR2805923B1 (fr) * | 2000-03-06 | 2002-05-24 | St Microelectronics Sa | Procede de fabrication d'un transistor bipolaire double- polysilicium auto-aligne |
| JP3528756B2 (ja) | 2000-05-12 | 2004-05-24 | 松下電器産業株式会社 | 半導体装置 |
| US6541346B2 (en) | 2001-03-20 | 2003-04-01 | Roger J. Malik | Method and apparatus for a self-aligned heterojunction bipolar transistor using dielectric assisted metal liftoff process |
| US20050250289A1 (en) | 2002-10-30 | 2005-11-10 | Babcock Jeffrey A | Control of dopant diffusion from buried layers in bipolar integrated circuits |
| US6794237B2 (en) * | 2001-12-27 | 2004-09-21 | Texas Instruments Incorporated | Lateral heterojunction bipolar transistor |
| US6670654B2 (en) | 2002-01-09 | 2003-12-30 | International Business Machines Corporation | Silicon germanium heterojunction bipolar transistor with carbon incorporation |
| US6858532B2 (en) * | 2002-12-10 | 2005-02-22 | International Business Machines Corporation | Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling |
| JP2004228605A (ja) * | 2004-05-14 | 2004-08-12 | Matsushita Electric Ind Co Ltd | エッチング方法 |
| JP2006324294A (ja) * | 2005-05-17 | 2006-11-30 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US7300849B2 (en) * | 2005-11-04 | 2007-11-27 | Atmel Corporation | Bandgap engineered mono-crystalline silicon cap layers for SiGe HBT performance enhancement |
| US7651919B2 (en) * | 2005-11-04 | 2010-01-26 | Atmel Corporation | Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization |
| US7601629B2 (en) * | 2005-12-20 | 2009-10-13 | Texas Instruments Incorporated | Semiconductive device fabricated using subliming materials to form interlevel dielectrics |
| US7812339B2 (en) * | 2007-04-23 | 2010-10-12 | Mears Technologies, Inc. | Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures |
-
2009
- 2009-06-22 US US12/488,899 patent/US8482101B2/en active Active
-
2010
- 2010-05-20 KR KR1020100047579A patent/KR20100137356A/ko not_active Withdrawn
- 2010-06-17 CN CN201010206375.5A patent/CN101930998A/zh active Pending
- 2010-06-22 JP JP2010141326A patent/JP5704844B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101930998A (zh) | 2010-12-29 |
| US20100320571A1 (en) | 2010-12-23 |
| JP5704844B2 (ja) | 2015-04-22 |
| US8482101B2 (en) | 2013-07-09 |
| JP2011003907A (ja) | 2011-01-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 20100520 |
|
| PG1501 | Laying open of application | ||
| PC1203 | Withdrawal of no request for examination | ||
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |