KR20080099128A - 배선 기판 및 그 제조 방법 - Google Patents

배선 기판 및 그 제조 방법 Download PDF

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Publication number
KR20080099128A
KR20080099128A KR1020080030144A KR20080030144A KR20080099128A KR 20080099128 A KR20080099128 A KR 20080099128A KR 1020080030144 A KR1020080030144 A KR 1020080030144A KR 20080030144 A KR20080030144 A KR 20080030144A KR 20080099128 A KR20080099128 A KR 20080099128A
Authority
KR
South Korea
Prior art keywords
hole
plating layer
wiring pattern
wiring
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020080030144A
Other languages
English (en)
Korean (ko)
Inventor
아키오 호리우치
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20080099128A publication Critical patent/KR20080099128A/ko
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/243—Reinforcing of the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
KR1020080030144A 2007-05-08 2008-04-01 배선 기판 및 그 제조 방법 Withdrawn KR20080099128A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007123154A JP2008282842A (ja) 2007-05-08 2007-05-08 配線基板及びその製造方法
JPJP-P-2007-00123154 2007-05-08

Publications (1)

Publication Number Publication Date
KR20080099128A true KR20080099128A (ko) 2008-11-12

Family

ID=39968500

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020080030144A Withdrawn KR20080099128A (ko) 2007-05-08 2008-04-01 배선 기판 및 그 제조 방법

Country Status (4)

Country Link
US (2) US20080277155A1 (https=)
JP (1) JP2008282842A (https=)
KR (1) KR20080099128A (https=)
TW (1) TW200845835A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130136995A (ko) * 2010-10-19 2013-12-13 비아시스템, 인크. 랩 도금부를 가진 비아를 가진 인쇄 회로 기판을 제조하는 방법
WO2024034703A1 (ko) * 2022-08-10 2024-02-15 엘지전자 주식회사 인쇄회로기판 및 그 제조방법

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5313202B2 (ja) * 2010-04-30 2013-10-09 日本メクトロン株式会社 ビルドアップ型多層プリント配線板及びその製造方法
KR101165330B1 (ko) 2010-11-11 2012-07-18 삼성전기주식회사 인쇄회로기판 및 그 제조 방법
US10028394B2 (en) * 2012-12-17 2018-07-17 Intel Corporation Electrical interconnect formed through buildup process
JP6819268B2 (ja) * 2016-12-15 2021-01-27 凸版印刷株式会社 配線基板、多層配線基板、及び配線基板の製造方法
EP3570645B1 (en) * 2018-05-17 2023-01-25 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with only partially filled thermal through-hole
JP7336845B2 (ja) * 2018-11-30 2023-09-01 京セラ株式会社 印刷配線板の製造方法
JP7237572B2 (ja) * 2018-12-27 2023-03-13 京セラ株式会社 印刷配線板の製造方法及び複合印刷配線板の製造方法
DE102019108870A1 (de) * 2019-04-04 2020-10-08 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Träger mit verkleinerter Durchkontaktierung
TWI744896B (zh) * 2020-05-12 2021-11-01 台灣愛司帝科技股份有限公司 導電玻璃基板以及導電玻璃基板的製造系統與製作方法
KR20220059740A (ko) * 2020-11-03 2022-05-10 삼성전기주식회사 인쇄회로기판
CN112788853A (zh) * 2021-01-09 2021-05-11 勤基电路板（深圳）有限公司 一种增加过孔处焊盘面积的电路板的生产工艺及该电路板
CN113725150B (zh) * 2021-08-30 2024-06-07 中国电子科技集团公司第五十八研究所 一种通孔填充制作方法
CN115334764A (zh) * 2022-08-10 2022-11-11 惠州市纬德电路有限公司 一种台阶型邦定铜帽pad的pcb制作工艺
CN119031579A (zh) * 2023-05-24 2024-11-26 庆鼎精密电子（淮安）有限公司 电路板及其制造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06275959A (ja) * 1993-03-22 1994-09-30 Hitachi Ltd 多層配線基板とその製造方法および両面プリント配線板の製造方法
JP3375732B2 (ja) * 1994-06-07 2003-02-10 株式会社日立製作所 薄膜配線の形成方法
TWI310670B (en) * 2003-08-28 2009-06-01 Ibm Printed wiring board manufacturing method and printed wiring board
JP4549807B2 (ja) * 2004-10-27 2010-09-22 シャープ株式会社 多層プリント配線板の製造方法、多層プリント配線板及び電子装置
JP2006216714A (ja) * 2005-02-02 2006-08-17 Ibiden Co Ltd 多層プリント配線板
JP2006294956A (ja) * 2005-04-13 2006-10-26 Cmk Corp 多層プリント配線板とその製造方法
JP2007129180A (ja) * 2005-10-03 2007-05-24 Cmk Corp プリント配線板、多層プリント配線板及びその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130136995A (ko) * 2010-10-19 2013-12-13 비아시스템, 인크. 랩 도금부를 가진 비아를 가진 인쇄 회로 기판을 제조하는 방법
WO2024034703A1 (ko) * 2022-08-10 2024-02-15 엘지전자 주식회사 인쇄회로기판 및 그 제조방법

Also Published As

Publication number Publication date
US20110258850A1 (en) 2011-10-27
US20080277155A1 (en) 2008-11-13
TW200845835A (en) 2008-11-16
JP2008282842A (ja) 2008-11-20

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20080401

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid