KR20060043811A - 도금 방법 - Google Patents

도금 방법 Download PDF

Info

Publication number
KR20060043811A
KR20060043811A KR1020050019919A KR20050019919A KR20060043811A KR 20060043811 A KR20060043811 A KR 20060043811A KR 1020050019919 A KR1020050019919 A KR 1020050019919A KR 20050019919 A KR20050019919 A KR 20050019919A KR 20060043811 A KR20060043811 A KR 20060043811A
Authority
KR
South Korea
Prior art keywords
plating
resist layer
negative resist
semiconductor wafer
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020050019919A
Other languages
English (en)
Korean (ko)
Inventor
다카하루 야마노
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20060043811A publication Critical patent/KR20060043811A/ko
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • G03F7/203—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure comprising an imagewise exposure to electromagnetic radiation or corpuscular radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020050019919A 2004-03-11 2005-03-10 도금 방법 Withdrawn KR20060043811A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004069421A JP3715637B2 (ja) 2004-03-11 2004-03-11 めっき方法
JPJP-P-2004-00069421 2004-03-11

Publications (1)

Publication Number Publication Date
KR20060043811A true KR20060043811A (ko) 2006-05-15

Family

ID=34918491

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020050019919A Withdrawn KR20060043811A (ko) 2004-03-11 2005-03-10 도금 방법

Country Status (5)

Country Link
US (1) US7790359B2 (enExample)
JP (1) JP3715637B2 (enExample)
KR (1) KR20060043811A (enExample)
CN (1) CN100533686C (enExample)
TW (1) TW200536063A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160132140A (ko) * 2011-04-15 2016-11-17 노벨러스 시스템즈, 인코포레이티드 인터커넥트 구조물 충전 방법 및 장치
US10923340B2 (en) 2015-05-14 2021-02-16 Lam Research Corporation Apparatus and method for electrodeposition of metals with the use of an ionically resistive ionically permeable element having spatially tailored resistivity

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007299960A (ja) * 2006-04-28 2007-11-15 Toshiba Corp 半導体装置及びその製造方法
JP5247998B2 (ja) * 2006-08-11 2013-07-24 株式会社テラミクロス 半導体装置の製造方法
JP2009266995A (ja) * 2008-04-24 2009-11-12 Casio Comput Co Ltd 半導体装置の製造方法
JP5782398B2 (ja) 2012-03-27 2015-09-24 株式会社荏原製作所 めっき方法及びめっき装置
CN102707566A (zh) * 2012-05-22 2012-10-03 上海宏力半导体制造有限公司 光刻方法
JP6328582B2 (ja) * 2014-03-31 2018-05-23 株式会社荏原製作所 めっき装置、および基板ホルダの電気接点の電気抵抗を決定する方法
CN105575880B (zh) * 2014-10-09 2018-10-23 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制作方法
CN104538287B (zh) * 2014-11-24 2017-08-11 通富微电子股份有限公司 半导体制造电镀治具密封接触光阻区域形成方法
CN106773537B (zh) * 2016-11-21 2018-06-26 中国电子科技集团公司第十一研究所 一种基片的表面光刻和湿法刻蚀方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3391125B2 (ja) 1994-12-15 2003-03-31 株式会社デンソー 半導体ウエハ用メッキ治具
JP4037504B2 (ja) 1998-01-09 2008-01-23 株式会社荏原製作所 半導体ウエハのメッキ治具
JP3415089B2 (ja) * 1999-03-01 2003-06-09 住友金属鉱山株式会社 プリント配線板の製造方法
JP3430290B2 (ja) * 1999-11-26 2003-07-28 カシオ計算機株式会社 半導体装置の製造方法
JP4649792B2 (ja) 2001-07-19 2011-03-16 日本電気株式会社 半導体装置
JP2003151875A (ja) * 2001-11-09 2003-05-23 Mitsubishi Electric Corp パターンの形成方法および装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160132140A (ko) * 2011-04-15 2016-11-17 노벨러스 시스템즈, 인코포레이티드 인터커넥트 구조물 충전 방법 및 장치
US10923340B2 (en) 2015-05-14 2021-02-16 Lam Research Corporation Apparatus and method for electrodeposition of metals with the use of an ionically resistive ionically permeable element having spatially tailored resistivity

Also Published As

Publication number Publication date
JP3715637B2 (ja) 2005-11-09
CN1667802A (zh) 2005-09-14
US20050202346A1 (en) 2005-09-15
TW200536063A (en) 2005-11-01
CN100533686C (zh) 2009-08-26
US7790359B2 (en) 2010-09-07
JP2005256090A (ja) 2005-09-22

Similar Documents

Publication Publication Date Title
JP4777644B2 (ja) 半導体装置およびその製造方法
US5496770A (en) Method for manufacturing a semiconductor chip bump having improved contact characteristics
US5834844A (en) Semiconductor device having an element with circuit pattern thereon
KR20060043811A (ko) 도금 방법
US10438912B2 (en) Liquid ejection head substrate and semiconductor substrate
US6140155A (en) Method of manufacturing semiconductor device using dry photoresist film
US20080054479A1 (en) Semiconductor device and method of producing the same
US20040253802A1 (en) Method of plating electrode formation
JP2002313832A (ja) 突起電極とその製造方法
JP2006066437A (ja) 半導体装置の製造方法及び当該製造方法に使用される製造装置
JP3988679B2 (ja) 半導体基板
JP5247998B2 (ja) 半導体装置の製造方法
CN110320760B (zh) 一种通过多次曝光保证Wafer ID可识别的曝光方法
TWI773915B (zh) 半導體裝置
JP5503590B2 (ja) 半導体装置
JPH09321049A (ja) バンプ構造体の製造方法
US7229851B2 (en) Semiconductor chip stack
JP4971960B2 (ja) 半導体装置の製造方法
JP2016138918A (ja) 半導体装置の製造方法およびフォトマスク
KR19990011139A (ko) 비지에이 반도체 리이드프레임과 그 제조방법
TWI226120B (en) Method for forming bumps by photo chemical deposition
JP3627234B2 (ja) 半導体装置の製造方法
JP4513196B2 (ja) 半導体装置の製造方法および半導体装置
JP2008084919A (ja) 半導体装置の製造方法
KR20240014949A (ko) 반도체 패키지의 제조 방법

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20050310

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid