KR20050037600A - 반도체 집적 회로 - Google Patents
반도체 집적 회로 Download PDFInfo
- Publication number
- KR20050037600A KR20050037600A KR1020057003904A KR20057003904A KR20050037600A KR 20050037600 A KR20050037600 A KR 20050037600A KR 1020057003904 A KR1020057003904 A KR 1020057003904A KR 20057003904 A KR20057003904 A KR 20057003904A KR 20050037600 A KR20050037600 A KR 20050037600A
- Authority
- KR
- South Korea
- Prior art keywords
- power supply
- voltage
- transistor
- circuit
- circuit block
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 65
- 230000004913 activation Effects 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 230000009849 deactivation Effects 0.000 claims description 5
- 230000004044 response Effects 0.000 claims description 4
- 230000008859 change Effects 0.000 claims description 3
- 238000009414 blockwork Methods 0.000 abstract 1
- 208000035795 Hypocalcemic vitamin D-dependent rickets Diseases 0.000 description 27
- 208000033584 type 1 vitamin D-dependent rickets Diseases 0.000 description 27
- 101100481702 Arabidopsis thaliana TMK1 gene Proteins 0.000 description 26
- 102100031699 Choline transporter-like protein 1 Human genes 0.000 description 11
- 101000940912 Homo sapiens Choline transporter-like protein 1 Proteins 0.000 description 11
- 230000000052 comparative effect Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 8
- 101000891367 Homo sapiens Transcobalamin-1 Proteins 0.000 description 7
- 102100040396 Transcobalamin-1 Human genes 0.000 description 7
- 101000666730 Homo sapiens T-complex protein 1 subunit alpha Proteins 0.000 description 6
- 102100038410 T-complex protein 1 subunit alpha Human genes 0.000 description 6
- 239000012535 impurity Substances 0.000 description 6
- 101150070189 CIN3 gene Proteins 0.000 description 3
- 101150110971 CIN7 gene Proteins 0.000 description 3
- 101150110298 INV1 gene Proteins 0.000 description 3
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 101100481704 Arabidopsis thaliana TMK3 gene Proteins 0.000 description 2
- 102100035954 Choline transporter-like protein 2 Human genes 0.000 description 2
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 2
- 101100508840 Daucus carota INV3 gene Proteins 0.000 description 2
- 101000948115 Homo sapiens Choline transporter-like protein 2 Proteins 0.000 description 2
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 108010089894 bradykinin potentiating factors Proteins 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims (6)
- 저임계치를 갖는 트랜지스터로 구성되는 회로 블록과,전원 전압이 공급되는 제1 실전원선과,상기 회로 블록의 전원 단자에 접속되는 가상 전원선과,상기 제1 실전원선과 상기 가상 전원선 사이에 직렬 접속되고, 고임계치를 갖는 제1 도전형 트랜지스터 및 상기 제1 도전형 트랜지스터와는 역극성의 저임계치를 갖는 제2 도전형 트랜지스터와,상기 제1 및 제2 도전형 트랜지스터를 상기 회로 블록의 동작 중에 온시키는 동시에, 상기 회로 블록의 비동작 중에 오프시키는 전원 제어 회로를 구비하는 것을 특징으로 하는 반도체 집적 회로.
- 제1항에 있어서, 상기 전원 전압보다 높은 고전원 전압이 공급되는 제2 실전원선을 구비하고,상기 제1 도전형 트랜지스터는 nMOS 트랜지스터이며,상기 제2 도전형 트랜지스터는 pMOS 트랜지스터이고,상기 전원 제어 회로는,상기 회로 블록의 동작 중에 상기 고전원 전압으로 고정되는 동시에, 상기 회로 블록의 비동작 중에 접지 전압으로 고정되는 제1 트랜지스터 제어 신호를 상기 nMOS 트랜지스터의 게이트에 인가하며,상기 회로 블록의 동작 중에 상기 접지 전압으로 고정되는 동시에, 상기 회로 블록의 비동작 중에 상기 전원 전압으로 고정되는 제2 트랜지스터 제어 신호를 상기 pMOS 트랜지스터의 게이트에 인가하는 것을 특징으로 하는 반도체 집적 회로.
- 제2항에 있어서, 상기 전원 제어 회로는 상기 회로 블록을 동작시키기 위해서 활성화되는 회로 블록 제어 신호의 활성화에 응답하여 상기 제1 트랜지스터 제어 신호를 상기 접지 전압에서 상기 고전원 전압으로 변화시키는 동시에, 상기 제2 트랜지스터 제어 신호를 상기 전원 전압에서 상기 접지 전압으로 변화시키고,상기 회로 블록 제어 신호의 비활성화에 응답하여 상기 제1 트랜지스터 제어 신호를 상기 고전원 전압에서 상기 접지 전압으로 변화시키는 동시에, 상기 제2 트랜지스터 제어 신호를 상기 접지 전압에서 상기 전원 전압으로 변화시키는 것을 특징으로 하는 반도체 집적 회로.
- 제2항에 있어서, 상기 전원 제어 회로는 고논리 레벨에 대응하는 출력 전압을 상기 전원 전압에서 상기 고전원 전압으로 변환하는 레벨 변환 회로를 구비하고 있는 것을 특징으로 하는 반도체 집적 회로.
- 제2항에 있어서, 상기 고전원 전압을 강압하여, 상기 전원 전압으로서 상기 제1 실전원선에 공급하는 강압 회로를 구비하며,상기 고전원 전압은 외부 전원 단자를 통해 상기 제2 실전원선에 공급되는 것을 특징으로 하는 반도체 집적 회로.
- 제2항에 있어서, 상기 nMOS 트랜지스터의 백 게이트는 접지선에 접속되고, 상기 pMOS 트랜지스터의 백 게이트는 상기 제1 실전원선에 접속되어 있는 것을 특징으로 하는 반도체 집적 회로.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020057003904A KR100696230B1 (ko) | 2005-03-07 | 2003-03-06 | 반도체 집적 회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020057003904A KR100696230B1 (ko) | 2005-03-07 | 2003-03-06 | 반도체 집적 회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20050037600A true KR20050037600A (ko) | 2005-04-22 |
KR100696230B1 KR100696230B1 (ko) | 2007-03-21 |
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Family Applications (1)
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KR1020057003904A KR100696230B1 (ko) | 2005-03-07 | 2003-03-06 | 반도체 집적 회로 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100906059B1 (ko) * | 2007-11-05 | 2009-07-03 | 주식회사 동부하이텍 | Mtcmos셀 제조 방법 |
CN111354395A (zh) * | 2018-12-21 | 2020-06-30 | 英飞凌科技股份有限公司 | 存储单元装置和用于运行存储单元装置的方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3112047B2 (ja) * | 1991-11-08 | 2000-11-27 | 株式会社日立製作所 | 半導体集積回路 |
JP3727838B2 (ja) * | 2000-09-27 | 2005-12-21 | 株式会社東芝 | 半導体集積回路 |
JP3693911B2 (ja) * | 2000-11-17 | 2005-09-14 | シャープ株式会社 | 半導体集積回路 |
-
2003
- 2003-03-06 KR KR1020057003904A patent/KR100696230B1/ko not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100906059B1 (ko) * | 2007-11-05 | 2009-07-03 | 주식회사 동부하이텍 | Mtcmos셀 제조 방법 |
CN111354395A (zh) * | 2018-12-21 | 2020-06-30 | 英飞凌科技股份有限公司 | 存储单元装置和用于运行存储单元装置的方法 |
Also Published As
Publication number | Publication date |
---|---|
KR100696230B1 (ko) | 2007-03-21 |
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