KR20050020289A - 임베디드 pcb 기판을 사용한 듀플렉서 및 그 제조 방법 - Google Patents
임베디드 pcb 기판을 사용한 듀플렉서 및 그 제조 방법 Download PDFInfo
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- KR20050020289A KR20050020289A KR1020030058072A KR20030058072A KR20050020289A KR 20050020289 A KR20050020289 A KR 20050020289A KR 1020030058072 A KR1020030058072 A KR 1020030058072A KR 20030058072 A KR20030058072 A KR 20030058072A KR 20050020289 A KR20050020289 A KR 20050020289A
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- filter
- filter stage
- pcb substrate
- metal layer
- duplexer
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/70—Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
- H03H9/703—Networks using bulk acoustic wave devices
- H03H9/706—Duplexers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/20—Frequency-selective devices, e.g. filters
- H01P1/201—Filters for transverse electromagnetic waves
- H01P1/205—Comb or interdigital filters; Cascaded coaxial cavities
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/20—Frequency-selective devices, e.g. filters
- H01P1/213—Frequency-selective devices, e.g. filters combining or separating two or more different frequencies
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
- H03H9/0566—Constructional combinations of supports or holders with electromechanical or other electronic elements for duplexers
- H03H9/0571—Constructional combinations of supports or holders with electromechanical or other electronic elements for duplexers including bulk acoustic wave [BAW] devices
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0243—Printed circuits associated with mounted high frequency components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/1006—Non-printed filter
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/42—Piezoelectric device making
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49005—Acoustic transducer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electromagnetism (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Control Of Motors That Do Not Use Commutators (AREA)
- Waveguide Switches, Polarizers, And Phase Shifters (AREA)
Abstract
Description
Claims (13)
- 송신 주파수 대역의 신호를 통과시키는 제1필터단;수신 주파수 대역의 신호를 통과시키는 제2필터단;상부표면의 일정 부분에 상기 제1필터단 및 제2필터단이 서로 소정 거리 이격되어 접합되고, 상기 제1필터단 및 제2필터단간의 신호간섭을 방지하는 필터격리부를 내장한 임베디드 PCB 기판;및상기 제1필터단 및 상기 제2필터단의 상층으로 일정 거리 이격되도록 상기 임베디드 PCB 기판 상부 전면을 덮는 패키징 기판;을 포함하는 것을 특징으로 하는 듀플렉서.
- 제1항에 있어서,상기 제1필터단 및 제2필터단 중 적어도 하나는,하부전극, 압전층 및 상부전극이 차례로 적층되어 이루어지는 압전 박막 음향 공진기를 적어도 하나 포함하는 것을 특징으로 하는 듀플렉서.
- 제1항에 있어서,상기 제1필터단 및 제2필터단은,도전성 범프를 사용하는 범핑(bumping)방식으로, 각각 상기 임베디드 PCB 기판 상면과 소정간격의 에어갭을 가지도록 접합된 것을 특징으로 하는 듀플렉서.
- 제1항에 있어서,상기 필터 격리부는,상기 제1필터단 및 제2필터단으로 입력되는 신호 상호간의 주파수 위상차를 90°로 만들어 상호간섭을 방지하는 역할을 하는 것을 특징으로 하는 듀플렉서.
- 제4항에 있어서,상기 필터격리부는,PCB 기판의 양면에 제1메탈층, 유전층 및 제2메탈층이 순차적으로 적층되어 형성되는 커패시터 및 코일;을 포함하는 것을 특징으로 하는 듀플렉서.
- 제4항에 있어서,상기 필터격리부는, 순차적으로 적층된 수개의 PCB 기판 사이에 제작되어, 상기 제1필터단 및 제2필터단 중 어느 하나가 통과시키는 신호의 파장의 1/4 에 해당하는 길이를 가지는 트랜스미션 라인;을 포함하는 것을 특징으로 하는 듀플렉서.
- (a) 필터 격리부가 내장된 임베디드 PCB 기판을 제조하는 단계;(b) 상기 임베디드 PCB 기판 상면의 일정 부분상에 외부단자와의 접속을 위한 복수개의 패드(pad)를 형성하는 단계;(c) 하부전극, 압전층 및 상부전극이 차례로 적층된 압전 박막 음향 공진기를 적어도 하나 포함하는 제1필터단 및 제2필터단을 개별적으로 제작하는 단계;(d) 상기 임베디드 PCB기판에 형성된 상기 복수개의 패드에 상기 제1필터단 및 제2필터단을 각각 접합하는 단계;및(e) 상기 제1필터단 및 제2필터단과 소정거리 이격된 상태로 상기 임베디드 PCB 기판 전면을 패키징하는 단계;를 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
- 제7항에 있어서,상기 필터 격리부는, PCB 기판의 양면에 제1메탈층, 유전층 및 제2메탈층이 순차적으로 적층되어 형성되는 커패시터 및 코일을 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
- 제8항에 있어서,상기 (a) 단계는,PCB 기판 양면에 제1메탈층을 적층하는 단계;상기 제1메탈층에 포토레지스트 막을 적층한 후, 에칭하여 코일의 하부패턴을 제조하는 단계;상기 코일의 하부패턴 상에 제1프리프레그(prepreg) 및 유전체를 차례로 적층하고, 상기 유전체를 일정 형상으로 패터닝하는 단계;패터닝된 상기 유전체 상에 제2프리프레그 및 제2메탈층을 차례로 적층하는 단계;상기 제2메탈층을 하프에칭(half etching)한 후, 패터닝하여 코일의 상부 패턴을 제조하는 단계;상기 제2메탈층이 패터닝으로 제거된 부분을 드릴링(drilling)하여 상기 코일의 하부패턴을 노출시키는 단계;상기 드릴링된 부분을 메탈 도금하여 상기 코일의 하부패턴 및 상부패턴을 연결시키는 단계;상기 메탈 도금된 부분을 부분 에칭하여 코일을 제작하는 단계;및상기 코일 상에 제3프리프레그 및 제3메탈층을 차례로 적층하는 단계;를 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
- 제7항에 있어서,상기 필터 격리부는, 순차적으로 적층된 수개의 PCB 기판 사이에 제작된, 상기 제1필터단 및 제2필터단 중 어느 하나가 통과시키는 신호 파장의 1/4 에 해당하는 길이를 가지는 트랜스미션 라인;을 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
- 제7항에 있어서,상기 (b)단계는,상기 임베디드 PCB 기판의 일정 부분을 관통하는 두 개의 쓰루홀(through hole)을 제작하는 단계;상기 임베디드 PCB 기판의 상하부 표면 및 상기 쓰루홀의 양측 벽을 제4메탈층으로 도금하는 단계;양측 벽이 도금된 상기 쓰루홀의 내부 및 상기 임베디드 PCB 기판의 상하부 표면에 솔더 레지스트를 증착하고 패터닝하는 단계;및상기 임베디드 PCB 기판의 상하부 표면상에서 상기 솔더 레지스트가 증착되지 않은 부분을 제5메탈층으로 도금하는 단계;를 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
- 제7항에 있어서,상기 (d)단계는,상기 복수개의 패드 상부에 각각 도전성 범프를 제작하는 단계;및상기 임베디드 PCB 기판 상면과 소정간격의 에어갭을 가지도록 상기 제1필터단 및 제2필터단을 각각 상기 도전성 범프와 접합하는 단계;를 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
- 제7항에 있어서,상기 (e)단계는,별도 PCB 기판의 소정 부분을 식각하여 패키징 기판을 제조하는 단계;상기 PCB 기판 상에서 식각된 부분을 제외한 부분에 본딩 물질을 입히는 단계;및상기 식각된 부분 내에 상기 제1필터단 및 제2필터단이 소정거리 이격되어 위치하도록, 상기 패키징 기판을 상기 임베디드 PCB 기판에 접합하는 단계;를 포함하는 것을 특징으로 하는 듀플렉서의 제조 방법.
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KR1020030058072A KR100546832B1 (ko) | 2003-08-21 | 2003-08-21 | 임베디드 pcb 기판을 사용한 듀플렉서 및 그 제조 방법 |
EP04253883A EP1508936B1 (en) | 2003-08-21 | 2004-06-29 | Duplexer fabrication method using embedded PCB and duplexer fabricated by the same |
DE602004020716T DE602004020716D1 (de) | 2003-08-21 | 2004-06-29 | Herstellungsverfahren für Duplexer mit eingebetteter Leiterplatte und hiermit hergestellter Duplexer |
JP2004242915A JP2005073265A (ja) | 2003-08-21 | 2004-08-23 | 埋め込みpcb基板を用いたデュプレクサおよびその製造方法 |
US10/923,086 US7893792B2 (en) | 2003-08-21 | 2004-08-23 | Duplexer using an embedded PCB and method of fabricating the same |
US13/006,052 US8418331B2 (en) | 2003-08-21 | 2011-01-13 | Method of fabricating a duplexer using an embedded PCB |
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KR1020030058072A KR100546832B1 (ko) | 2003-08-21 | 2003-08-21 | 임베디드 pcb 기판을 사용한 듀플렉서 및 그 제조 방법 |
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EP (1) | EP1508936B1 (ko) |
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- 2004-06-29 DE DE602004020716T patent/DE602004020716D1/de not_active Expired - Fee Related
- 2004-08-23 JP JP2004242915A patent/JP2005073265A/ja active Pending
- 2004-08-23 US US10/923,086 patent/US7893792B2/en not_active Expired - Fee Related
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DE602004020716D1 (de) | 2009-06-04 |
US20050105478A1 (en) | 2005-05-19 |
JP2005073265A (ja) | 2005-03-17 |
EP1508936B1 (en) | 2009-04-22 |
KR100546832B1 (ko) | 2006-01-26 |
US8418331B2 (en) | 2013-04-16 |
US20110107570A1 (en) | 2011-05-12 |
EP1508936A1 (en) | 2005-02-23 |
US7893792B2 (en) | 2011-02-22 |
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