KR20020050416A - Capacitor in semiconductor device and method of making the same - Google Patents

Abstract

PURPOSE: A capacitor and a method for manufacturing the same are provided to prevent an oxidation of a lower electrode by forming an oxide diffusion barrier layer between the lower electrode and a dielectric film. CONSTITUTION: An interlayer dielectric having a contact hole is formed on a semiconductor substrate. A plug is formed by sequentially filling a plurality of conductive layers into the contact hole. A lower electrode is formed on the plug. An oxide diffusion barrier layer(31) made of a tantalum(Ta) is formed on the lower electrode. A dielectric film made of BST is formed on the oxide diffusion barrier layer(31). By annealing the resultant structure at atmosphere of oxygen, the Ta film is converted to a Ta2O5 film. Then, an upper electrode is formed on the dielectric film.

Description

Capacitor in semiconductor device and manufacturing method therefor {Capacitor in semiconductor device and method of making the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and more particularly, to a capacitor of a semiconductor device which improves stability of a capacitor by preventing oxidation of an underlying layer of a capacitor lower electrode through an oxide diffusion prevention layer between a lower electrode and a dielectric layer of the capacitor. It relates to a manufacturing method thereof.

As semiconductor devices are integrated, high dielectric materials and metal electrodes are used to secure necessary capacitance.

In addition, BST used as a high dielectric material requires N ₂ O or N ₂ + O ₂ plasma heat treatment at low temperature and heat treatment in a high temperature oxygen atmosphere to compensate for oxygen deficiency during the deposition and heat treatment processes.

However, when the Ru layer is used as the lower electrode of the capacitor, oxygen passes through the BST layer and the lower electrode is oxidized to generate RuO _{2. When the} Pt layer is used as the lower electrode of the capacitor, oxygen is barriered through the grain boundary of the Pt layer. Diffusion to the metal layer results in oxidation of the barrier metal layer.

Therefore, in order to prevent oxidation of the lower electrode and the barrier metal layer of the capacitor and to secure the electrical characteristics of the capacitor using the BST dielectric layer, subsequent heat treatment process conditions are limited.

Due to this problem, there is a demand for a process technology for forming a dielectric layer and inhibiting oxidation of the lower electrode and the barrier metal layer of the capacitor in a subsequent heat treatment process.

Hereinafter, a capacitor manufacturing method of a semiconductor device of the prior art will be described with reference to the accompanying drawings.

1A to 1E are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to the prior art.

As shown in FIG. 1A, a first insulating layer 2 is formed as an oxide layer on a semiconductor substrate 1 on which word lines (not shown) and bit lines (not shown) are formed, and a first insulating layer is formed. (2) is etched to form the first contact hole 3, and then a polycrystalline silicon layer is laminated and etched back on the first insulating layer 2 including the first contact hole 3 The silicon plug 4 is formed.

As shown in FIG. 1B, the Ti layer 5 is formed as a barrier metal layer on the polycrystalline silicon plug 4 in the first contact hole 3, and the TiN layer 6 is formed on the Ti layer 5.

As shown in FIG. 1C, a nitride layer 7 is formed on the first insulating layer 2 and the TiN layer 6 by an oxide etch barrier layer, and an oxide layer is formed on the nitride layer 7. 2 Insulating layer 8 is formed.

The second insulating layer 8 corresponding to the first contact hole 3 is etched to form a second contact hole 9 for forming a capacitor structure.

As shown in FIG. 1D, a first Ru layer 10 is formed on the second insulating layer 8 including the second contact hole 9 to form a capacitor lower electrode, and is etched using CMP or etch back. The lower electrode of the capacitor is formed in the contact hole 8.

In this case, a Pt layer may be used instead of the first Ru layer 10.

As shown in FIG. 1E, the BST layer 11 is formed as the dielectric layer on the first Ru layer 10, and the second Ru layer 12 is formed as the upper electrode of the capacitor on the BST layer 10.

Such a capacitor of a semiconductor device of the prior art has the following problems.

When using the BST layer as the high dielectric material and the Ru layer as the lower electrode material in order to secure the required capacitance of the capacitor, the BST layer is deposited on the lower electrode and subjected to a heat treatment process. In particular, oxygen deficiency of the BST layer In order to compensate for this, N ₂ O or N ₂ + O ₂ plasma heat treatment at low temperature and heat treatment in a high temperature oxygen atmosphere are required.

However, when the Ru layer is used as the lower electrode of the capacitor, oxygen passes through the BST layer and the lower electrode is oxidized to generate RuO _{2. When the} Pt layer is used as the lower electrode of the capacitor, oxygen is barriered through the grain boundary of the Pt layer. Diffusion to the metal layer causes oxidation of the barrier metal layer.

Therefore, the BST layer cannot be sufficiently heat treated due to the oxidation of the lower electrode layer or the underlying layer of the capacitor, and even in such heat treatment, oxidation occurs at the lower electrode and the barrier metal layer of the capacitor, making it difficult to manufacture a stable capacitor. have.

In addition, the thickness of a capacitor lower electrode of a semiconductor device having a design rule of 0.1 μm or less is limited to 300 μs or less, which may be oxidized by oxygen diffused through the lower electrode during deposition of a BST layer and subsequent heat treatment. In order to increase the thickness and lower the subsequent heat treatment process to prevent oxidation of the barrier metal layer, there is a problem that the thickness of the dielectric layer must be increased to increase the area of the capacitor lower electrode.

1A to 1E are cross-sectional views of a capacitor manufacturing method of a semiconductor device of the prior art.

2A to 2F are cross-sectional views of a method of manufacturing a capacitor of a semiconductor device according to the present invention.

Explanation of symbols for the main parts of the drawings

21 semiconductor substrate 22 first insulating layer

23: first contact hole 24: polycrystalline silicon plug

25 Ti layer 26 TiN layer

27: nitride layer 28: second insulating layer

29: second contact hole 30: first Ru layer

31: Ta layer 32: BST layer

33: the second Ru layer

A capacitor of a semiconductor device according to the present invention for achieving the above object is an insulating layer having a contact hole on the semiconductor substrate; A plug in the contact hole; A lower electrode on the plug; An oxygen diffusion barrier layer on the lower electrode; A dielectric layer on the oxygen diffusion barrier layer; And an upper electrode on the dielectric layer.

According to another aspect of the present invention, there is provided a method of manufacturing a capacitor of a semiconductor device, the method including: forming an insulating layer having a contact hole on a semiconductor substrate; Forming a plug in the contact hole; Forming a lower electrode on the plug; Forming an oxygen diffusion barrier layer on the lower electrode; Forming a dielectric layer on the oxygen diffusion barrier layer; And forming an upper electrode on the dielectric layer.

The present invention is a method of improving the electrical characteristics of the capacitor by inhibiting the oxidation of the barrier metal layer during the thermal process after the dielectric layer deposition in the capacitor manufacturing process of the device having a design rule of 0.1um or less.

Hereinafter, a capacitor and a manufacturing method thereof of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are cross-sectional views of a method of manufacturing a capacitor of a semiconductor device according to the present invention.

As shown in FIG. 2A, a first insulating layer 22 is formed of an oxide layer on a semiconductor substrate 21 on which word lines (not shown) and bit lines (not shown) are formed, and a first insulating layer is formed. After etching the 22 to form the first contact hole 23, the polycrystalline silicon layer is laminated and etched back on the first insulating layer 22 including the first contact hole 23. The silicon plug 24 is formed.

As shown in FIG. 2B, the Ti layer 25 is formed as a barrier metal layer on the polycrystalline silicon plug 24 in the first contact hole 23, and the TiN layer 26 is formed on the Ti layer 25.

As shown in FIG. 2C, a nitride layer 27 is formed on the first insulating layer 22 and the TiN layer 26 as an oxide etch barrier layer, and an oxide layer is formed on the nitride layer 27. 2 Insulating layer 28 is formed.

The second insulating layer 28 corresponding to the first contact hole 23 is etched to form a second contact hole 29 for forming a capacitor structure.

As shown in FIG. 2D, the first Ru layer 30 is formed on the second insulating layer 28 including the second contact hole 29 by the LPCVD method, and is etched using CMP or etch back to form the second contact hole ( 28) to form the lower electrode of the capacitor.

Instead of the first Ru layer 30, Pt, RuO ₂ , Ir / IrO ₂ , SrRuO ₃ , or the like may be used.

The method of depositing the first Ru layer 30 by the LPCVD method uses Ru (OD) ₃ and Ru (Etcp) ₂ as Ru raw materials, and makes the raw materials in a gaseous state by using a vaporizer. The flow rate of Ar, the carrier gas of the material, is 50 to 200 sccm, the flow rate of O ₂ , which is a reactive gas for decomposing raw materials, is 50 to 400 sccm, the flow rate of the diluent gas Ar is 400 to 800 sccm, and the pressure of the reaction chamber is 0.1. ~ 10 torr, and the temperature of the semiconductor substrate 21 is deposited to a Rudmf 100 ~ 300 Å thickness under the conditions of 230 ~ 350 ℃.

Wherein the formula of Ru (OD) ₃ is Ru (ch ₃ COCHCOCH ₂ CH ₂ CH ₂ ch ₃ ) ₃ , the chemical name is Tris (2,4-octanedionato) ruthenium, and the formula of Ru (Etcp) ₂ is (Ru (C ₂ H ₅ C ₅ H ₄ ) ₂ ), and the chemical formula is Bis (rthylcyclopentadieny) ruthenium.

In order to remove the oxygen atoms contained in the first Ru layer 30, NH ₃ plasma treatment is performed in-situ in the chamber in which the dielectric layer is deposited to be contained in the Ru layer 30. Remove the oxygen atom.

In the method of removing oxygen atoms, the temperature of the semiconductor substrate 21 is the same as the deposition temperature of the dielectric layer Ta ₂ O ₅ , the plasma power during plasma treatment is 100 to 300 W, the flow rate of NH 3 gas is 100 to 300 sccm, the pressure of the reaction chamber Is 0.1 to 2 torr, and the treatment time is performed under the conditions of 60 to 120 seconds.

As shown in FIG. 2E, after the plasma treatment of the first Ru layer 30, the Ta layer 31 is deposited by the ALD method (atomic layer deposition method).

The Ta layer 31 is deposited by using TaCl ₅ as a raw material of Ta, N ₂ or Ar as a reaction gas, and H ₂ or NH ₃ as a purge gas. The flow rate of the carrier gas and the purge gas is maintained at 100 to 200 sccm, thirdly, the pressure of the reaction chamber is 0.1 to 10 torr, and the temperature of the semiconductor substrate 21 is maintained at 230 to 350 ° C. The amount of material is maintained at 0.006 ~ 0.1 cc / min, and fifthly, the flow rate of TaCl ₅ raw material is flowed in the gaseous state for 0.1 ~ several seconds in the vaporizer is maintained at 150 ~ 200 ℃, and the sixth N ₂ or NH ₃ performs a plasma treatment while flowing for 0.1 to several seconds.

At this time, the R.F power during plasma treatment is 30 ~ 500 watt and the pressure of the reaction chamber is maintained at 0.1 ~ 10 torr.

In this case, the Ta layer 31 may be repeatedly performed by the fifth and sixth, or the sixth step may be omitted when the plasma treatment is performed by exciting the plasma in the fifth step.

As shown in FIG. 2F, the BST layer 32 is deposited by the MOCVD method after the deposition of the Ta layer 31.

The first method of depositing the BST layer 32 includes Ba (METHD) ₂ , Sr (METHD) ₂ , Ti (MPD) (THD) ₂ as a raw material of BST, and Ar or N ₂ as a carrier gas of a reaction raw material. And using O ₂ or N ₂ O as the oxidizing gas, secondly, the rain gas has a good flow rate of 200 to 400 sccm, the flow rate of the oxidizing gas is 300 to 1000 sccm, and the third pressure and temperature of the reactor A BST layer 32 having a thickness of 50 to 300 mm 3 is deposited under conditions of 1 to 5 torr and 350 to 420 ° C.

And a low-temperature process to the next step of the BST layer 32 is subjected to the plasma heat treatment or UV-O ₃ heat-treated carbon .BST layer, plasma treatment and UV-O ₃ in order to remove the impurities and defects, such as hydrogen in the 32 The heat treatment method firstly plasma treatment at a power of 200 to 500 watts for 30 to 120 seconds in an O ₂ or N ₂ O and N ₂ + O ₂ mixed gas atmosphere at a temperature of 300 to 500 ℃ and secondly 300 to 450 ℃ UV-O ₃ treatment at a strength of 15 to 30 mW / cm ² for 2 to 10 minutes.

In order to improve the dielectric properties of the BST layer 32, a rapid thermal anneal process is performed at a temperature of 500 to 750 ° C. for 1 to 10 minutes in an Ar or N ₂ atmosphere.

Here, the Ta layer 31 which is stacked before the BST layer 32 is formed has an interface between the BST layer 32 and the lower electrode of the capacitor because the Ta layer 31 reacts with oxygen in a subsequent thermal process of the BST layer 32. By forming Ta ₂ O ₅ , the electrical characteristics of the capacitor can be improved by preventing oxidation of the lower electrode and the barrier metal layer of the capacitor against oxygen diffusion.

As shown in FIG. 2F, a second Ru layer 33 is formed on the BST layer 32 as the upper electrode of the capacitor, and rapid heat treatment for 10 to 60 minutes at 350 to 600 ° C. in a nitrogen atmosphere containing several% oxygen. Carry out a furnace.

The upper electrode of the capacitor may use Pt, RuO ₂ , Ir / IrO ₂ , or SrRuO instead of the second Ru layer 33.

Such a capacitor of a semiconductor device and a method of manufacturing the same according to the present invention have the following effects.

The Ta layer is deposited between the Ru layer used as the lower electrode of the capacitor and the BST layer used as the dielectric layer, and the Ta layer reacts with oxygen to form a Ta ₂ O ₅ layer in a subsequent heat treatment process. Prevent oxidation of the barrier metal layer.

Therefore, it is possible to increase the temperature in the subsequent heat treatment process of the BST layer and to use the stable leakage current characteristics of the interface of the Ta ₂ O ₅ layer / Ru layer can contribute to the process stability and yield increase of the semiconductor device.

Claims (9)

An insulating layer having a contact hole on the semiconductor substrate; A plug in the contact hole; A lower electrode on the plug; An oxygen diffusion barrier layer on the lower electrode; A dielectric layer on the oxygen diffusion barrier layer; And a top electrode on the dielectric layer. The capacitor of claim 1, wherein the lower electrode and the upper electrode are selected from Ru, Pt, RuO ₂ , Ir / IrO ₂ , and SrRuO ₃ . The capacitor of claim 1, wherein the oxygen diffusion barrier layer uses Ta ₂ O ₅ . Forming an insulating layer having a contact hole on the semiconductor substrate; Forming a plug in the contact hole; Forming a lower electrode on the plug; Forming an oxygen diffusion barrier layer on the lower electrode; Forming a dielectric layer on the oxygen diffusion barrier layer; And forming an upper electrode on the dielectric layer. The method of claim 4, wherein the forming of the oxygen diffusion barrier layer is Forming a Ta layer on the lower electrode; Forming a BST layer on the Ta layer as the dielectric layer; And heat-treating in an oxygen atmosphere to improve the dielectric properties of the BST layer, thereby changing the Ta layer to Ta ₂ O ₅ . The method of claim 5, wherein the Ta layer is formed by using TaCl ₅ as a raw material of Ta, N ₂ or Ar as a carrier gas, and H ₂ or NH ₃ gas as a purge gas. The flow rate of the gas and purge gas is 100 to 200 sccm, the pressure of the reaction chamber is 0.1 to 10 torr, the temperature of the semiconductor substrate is 230 to 350 ° C, the amount of Ta raw material is 0.006 to 0.1 cc / min, and the flow rate of TaCl ₅ is 150 The vaporizer is maintained in the state of ~ 200 ℃ in the gaseous state supply time is 0.1 ~ seconds, N ₂ or NH ₃ supply time is 0.1 ~ seconds, RF power is formed by the ALD method under the conditions of 30 ~ 500 watt A method for producing a capacitor of a semiconductor device. The method of claim 5, wherein the lower electrode and the upper electrode are selected from Ru, Pt, RuO ₂ , Ir / IrO ₂ , and SrRuO ₃ . The method of claim 5, wherein the BST layer is formed by Ba (METHD) ₂ , Sr (METHD) ₂ , Ti (MPD) (THD) ₂ as a raw material of BST, or Ar or N ₂ , as a carrier gas of the reaction raw material. And using O ₂ or N ₂ O as the oxidizing gas, the flow rate of the carrier gas is 200 ~ 400 sccm, the flow rate of the oxidizing gas is 300 ~ 1000 sccm, the pressure and temperature of the reactor 1 ~ 5 torr and 350 ~ 420 ℃ A method of manufacturing a capacitor for a semiconductor device, characterized in that to deposit a BST layer of 50 ~ 300 Å thickness by the MOCVD method at the temperature under the conditions of. 6. The method of claim 5, wherein the subsequent heat treatment of the BST layer is first performed at a temperature of 300-500 ° C. for a power of 200-500 watts for 30-120 seconds in an O ₂ or N ₂ O and N ₂ + O ₂ mixed gas atmosphere. Plasma treatment, and secondly, UV-O ₃ treatment at a intensity of 15 to 30 mW / cm ² for 2 to 10 minutes at a temperature of 300 to 450 ℃.