KR20010080635A - 텅스텐 실리사이드막을 형성하여 금속-절연막-반도체형트랜지스터를 제조하는 방법 - Google Patents

텅스텐 실리사이드막을 형성하여 금속-절연막-반도체형트랜지스터를 제조하는 방법 Download PDF

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Publication number
KR20010080635A
KR20010080635A KR1020017006766A KR20017006766A KR20010080635A KR 20010080635 A KR20010080635 A KR 20010080635A KR 1020017006766 A KR1020017006766 A KR 1020017006766A KR 20017006766 A KR20017006766 A KR 20017006766A KR 20010080635 A KR20010080635 A KR 20010080635A
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KR
South Korea
Prior art keywords
film
forming
tungsten silicide
silicon
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020017006766A
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English (en)
Korean (ko)
Inventor
마나부 야마자끼
유지 마에다
야스유끼 가네코
이치로 가와이
Original Assignee
조셉 제이. 스위니
어플라이드 머티어리얼스, 인코포레이티드
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Publication date
Application filed by 조셉 제이. 스위니, 어플라이드 머티어리얼스, 인코포레이티드 filed Critical 조셉 제이. 스위니
Publication of KR20010080635A publication Critical patent/KR20010080635A/ko
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H10P34/422—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing using incoherent radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/50—Alloying conductive materials with semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
KR1020017006766A 1999-09-30 2000-09-29 텅스텐 실리사이드막을 형성하여 금속-절연막-반도체형트랜지스터를 제조하는 방법 Ceased KR20010080635A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1999-279609 1999-09-30
JP27960999A JP2001110750A (ja) 1999-09-30 1999-09-30 タングステンシリサイド膜を形成する方法、および金属−絶縁膜−半導体型トランジスタを製造する方法
PCT/JP2000/006791 WO2001024238A1 (fr) 1999-09-30 2000-09-29 Procede de formation de films de siliciure de tungstene et procede de fabrication de transistors metal-isolant-semi-conducteur

Publications (1)

Publication Number Publication Date
KR20010080635A true KR20010080635A (ko) 2001-08-22

Family

ID=17613378

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020017006766A Ceased KR20010080635A (ko) 1999-09-30 2000-09-29 텅스텐 실리사이드막을 형성하여 금속-절연막-반도체형트랜지스터를 제조하는 방법

Country Status (5)

Country Link
EP (1) EP1156517A1 (https=)
JP (1) JP2001110750A (https=)
KR (1) KR20010080635A (https=)
TW (1) TW469517B (https=)
WO (1) WO2001024238A1 (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100669141B1 (ko) * 2005-01-17 2007-01-15 삼성전자주식회사 오믹막 및 이의 형성 방법, 오믹막을 포함하는 반도체장치 및 이의 제조 방법
KR100680969B1 (ko) * 2005-08-18 2007-02-09 주식회사 하이닉스반도체 텅스텐실리사이드 박막 형성방법
KR101035738B1 (ko) * 2011-02-24 2011-05-20 주식회사 문라이트 보행자 및 자전거 도로용 조명기구
US9685527B2 (en) 2015-02-17 2017-06-20 Samsung Electronics Co., Ltd. Methods of forming metal silicide layers including dopant segregation

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6827796B2 (en) * 2000-11-02 2004-12-07 Composite Tool Company, Inc. High strength alloys and methods for making same
TWI395254B (zh) * 2006-01-25 2013-05-01 Air Water Inc Film forming device
TWI341012B (en) 2007-09-03 2011-04-21 Macronix Int Co Ltd Methods of forming nitride read only memory and word lines thereof
JP2011258811A (ja) * 2010-06-10 2011-12-22 Ulvac Japan Ltd 半導体装置の製造方法
JP2017022377A (ja) * 2015-07-14 2017-01-26 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2657306B2 (ja) * 1988-07-29 1997-09-24 東京エレクトロン株式会社 金属シリサイド膜の形成方法
JPH06216066A (ja) * 1993-01-14 1994-08-05 Fujitsu Ltd 半導体装置の製造方法
DE69518710T2 (de) * 1994-09-27 2001-05-23 Applied Materials Inc Verfahren zum Behandeln eines Substrats in einer Vakuumbehandlungskammer
EP0746027A3 (en) * 1995-05-03 1998-04-01 Applied Materials, Inc. Polysilicon/tungsten silicide multilayer composite formed on an integrated circuit structure, and improved method of making same
JPH0917998A (ja) * 1995-06-28 1997-01-17 Sony Corp Ｍｏｓトランジスタの製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100669141B1 (ko) * 2005-01-17 2007-01-15 삼성전자주식회사 오믹막 및 이의 형성 방법, 오믹막을 포함하는 반도체장치 및 이의 제조 방법
US7544597B2 (en) 2005-01-17 2009-06-09 Samsung Electronics Co., Ltd. Method of forming a semiconductor device including an ohmic layer
US7875939B2 (en) 2005-01-17 2011-01-25 Samsung Electronics Co., Ltd. Semiconductor device including an ohmic layer
KR100680969B1 (ko) * 2005-08-18 2007-02-09 주식회사 하이닉스반도체 텅스텐실리사이드 박막 형성방법
KR101035738B1 (ko) * 2011-02-24 2011-05-20 주식회사 문라이트 보행자 및 자전거 도로용 조명기구
US9685527B2 (en) 2015-02-17 2017-06-20 Samsung Electronics Co., Ltd. Methods of forming metal silicide layers including dopant segregation

Also Published As

Publication number Publication date
TW469517B (en) 2001-12-21
JP2001110750A (ja) 2001-04-20
WO2001024238A1 (fr) 2001-04-05
EP1156517A1 (en) 2001-11-21

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