KR20010021004A - 반도체 집적 회로 장치의 제조 방법 - Google Patents

반도체 집적 회로 장치의 제조 방법 Download PDF

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Publication number
KR20010021004A
KR20010021004A KR1020000033465A KR20000033465A KR20010021004A KR 20010021004 A KR20010021004 A KR 20010021004A KR 1020000033465 A KR1020000033465 A KR 1020000033465A KR 20000033465 A KR20000033465 A KR 20000033465A KR 20010021004 A KR20010021004 A KR 20010021004A
Authority
KR
South Korea
Prior art keywords
wafer
light shielding
shielding plate
integrated circuit
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020000033465A
Other languages
English (en)
Korean (ko)
Inventor
다나베요시까즈
나까쯔까야스히꼬
스즈끼다다시
Original Assignee
가나이 쓰토무
가부시키가이샤 히타치세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쓰토무, 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가나이 쓰토무
Publication of KR20010021004A publication Critical patent/KR20010021004A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0431—Apparatus for thermal treatment
    • H10P72/0436—Apparatus for thermal treatment mainly by radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/04—Planarisation of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H10W20/066—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying by forming silicides of refractory metals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist

Landscapes

  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020000033465A 1999-06-18 2000-06-17 반도체 집적 회로 장치의 제조 방법 Withdrawn KR20010021004A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP11172704A JP2001007039A (ja) 1999-06-18 1999-06-18 半導体集積回路装置の製造方法
JP1999-172704 1999-06-18

Publications (1)

Publication Number Publication Date
KR20010021004A true KR20010021004A (ko) 2001-03-15

Family

ID=15946807

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020000033465A Withdrawn KR20010021004A (ko) 1999-06-18 2000-06-17 반도체 집적 회로 장치의 제조 방법

Country Status (3)

Country Link
US (1) US6403475B1 (https=)
JP (1) JP2001007039A (https=)
KR (1) KR20010021004A (https=)

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* Cited by examiner, † Cited by third party
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DE10101548C1 (de) * 2001-01-15 2002-05-29 Infineon Technologies Ag Reaktionskammer zur Bearbeitung einer Substratscheibe und Verfahren zum Betrieb derselben
JP4340729B2 (ja) * 2002-06-10 2009-10-07 富士通マイクロエレクトロニクス株式会社 半導体装置とその製造方法
US6791668B2 (en) 2002-08-13 2004-09-14 Winbond Electronics Corporation Semiconductor manufacturing apparatus and method
JP2005072205A (ja) * 2003-08-22 2005-03-17 Seiko Epson Corp 熱処理方法、配線パターンの形成方法、電気光学装置の製造方法、電気光学装置及び電子機器
JP4712371B2 (ja) * 2004-12-24 2011-06-29 富士通セミコンダクター株式会社 半導体装置の製造方法
KR100648634B1 (ko) * 2005-01-21 2006-11-23 삼성전자주식회사 반도체 장치의 제조 방법
JP2006245558A (ja) * 2005-02-04 2006-09-14 Advanced Lcd Technologies Development Center Co Ltd 銅配線層、銅配線層の形成方法、半導体装置、及び半導体装置の製造方法
US20060178007A1 (en) * 2005-02-04 2006-08-10 Hiroki Nakamura Method of forming copper wiring layer
JP4103010B2 (ja) * 2005-04-01 2008-06-18 セイコーエプソン株式会社 半導体ウエハ
US20070202677A1 (en) * 2006-02-27 2007-08-30 Micron Technology, Inc. Contact formation
US7965375B2 (en) * 2007-07-03 2011-06-21 Qimoda Ag Lithography mask, rewritable mask, process for manufacturing a mask, device for processing a substrate, lithographic system and a semiconductor device
TW201023328A (en) * 2008-12-04 2010-06-16 Univ Ibaraki Semiconductor integrated circuit device and method for producing the same
JP2011187491A (ja) * 2010-03-04 2011-09-22 Toshiba Corp 半導体装置および半導体装置の製造方法
JP5730521B2 (ja) * 2010-09-08 2015-06-10 株式会社日立ハイテクノロジーズ 熱処理装置
CN106229264B (zh) * 2011-02-21 2019-10-25 应用材料公司 在激光处理系统中的周围层气流分布

Family Cites Families (22)

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JPS5932131A (ja) * 1982-08-18 1984-02-21 Nippon Kogaku Kk <Nikon> Ｘ線露光転写法および転写用マスク
JPS6294925A (ja) 1985-10-21 1987-05-01 Nec Corp 熱処理装置
JPH0789569B2 (ja) * 1986-03-26 1995-09-27 株式会社日立製作所 半導体集積回路装置及びその製造方法
JPS62250633A (ja) 1986-04-24 1987-10-31 Nec Corp ハロゲンランプアニ−ル装置
US5196910A (en) * 1987-04-24 1993-03-23 Hitachi, Ltd. Semiconductor memory device with recessed array region
JPH01110726A (ja) 1987-10-23 1989-04-27 Fujitsu Ltd ランプアニール方法
JPH01117319A (ja) 1987-10-30 1989-05-10 Nec Corp 半導体装置の製造方法
US5011794A (en) 1989-05-01 1991-04-30 At&T Bell Laboratories Procedure for rapid thermal annealing of implanted semiconductors
JP2515883B2 (ja) 1989-06-02 1996-07-10 山形日本電気株式会社 半導体装置製造用ランプアニ―ル装置
JPH05291170A (ja) 1992-04-08 1993-11-05 Hitachi Ltd 半導体製造装置
JPH06232138A (ja) 1993-02-03 1994-08-19 Mitsubishi Electric Corp 加熱アニール装置
US5838908A (en) * 1994-11-14 1998-11-17 Texas Instruments Incorporated Device for having processors each having interface for transferring delivery units specifying direction and distance and operable to emulate plurality of field programmable gate arrays
US5626680A (en) * 1995-03-03 1997-05-06 Silicon Valley Group, Inc. Thermal processing apparatus and process
US5830277A (en) * 1995-05-26 1998-11-03 Mattson Technology, Inc. Thermal processing system with supplemental resistive heater and shielded optical pyrometry
US6002109A (en) * 1995-07-10 1999-12-14 Mattson Technology, Inc. System and method for thermal processing of a semiconductor substrate
JPH0943858A (ja) * 1995-07-28 1997-02-14 Sony Corp 露光装置
JPH09237789A (ja) * 1996-02-29 1997-09-09 Toshiba Corp 遮蔽体および熱処理装置および熱処理方法
JP2976899B2 (ja) * 1996-09-04 1999-11-10 日本電気株式会社 真空成膜方法および装置
KR100302424B1 (ko) * 1996-10-14 2001-09-28 니시무로 타이죠 논리하이브리드메모리용반도체메모리
US6035101A (en) * 1997-02-12 2000-03-07 Applied Materials, Inc. High temperature multi-layered alloy heater assembly and related methods
JPH10321547A (ja) 1997-05-22 1998-12-04 Kokusai Electric Co Ltd 熱処理装置
US6030509A (en) * 1998-04-06 2000-02-29 Taiwan Semiconductor Manufacturing Co., Ltd Apparatus and method for shielding a wafer holder

Also Published As

Publication number Publication date
JP2001007039A (ja) 2001-01-12
US6403475B1 (en) 2002-06-11

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