KR19990013849A - Mos 트랜지스터 플래쉬 eprom 디바이스의 제조에서 실리콘 산화물의 이방성 화학 에칭 공정의 개선 - Google Patents
Mos 트랜지스터 플래쉬 eprom 디바이스의 제조에서 실리콘 산화물의 이방성 화학 에칭 공정의 개선 Download PDFInfo
- Publication number
- KR19990013849A KR19990013849A KR1019980028387A KR19980028387A KR19990013849A KR 19990013849 A KR19990013849 A KR 19990013849A KR 1019980028387 A KR1019980028387 A KR 1019980028387A KR 19980028387 A KR19980028387 A KR 19980028387A KR 19990013849 A KR19990013849 A KR 19990013849A
- Authority
- KR
- South Korea
- Prior art keywords
- etch
- silicon
- layer
- silicon oxide
- etching process
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
Landscapes
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Silicon Compounds (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ITRM97A000430 | 1997-07-14 | ||
| IT97RM000430A IT1293535B1 (it) | 1997-07-14 | 1997-07-14 | Perfezionamento nel procedimento di attacco chimico anisotropo dell'ossido di silicio, in particolare nella fabbricazione di |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR19990013849A true KR19990013849A (ko) | 1999-02-25 |
Family
ID=11405175
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019980028387A Ceased KR19990013849A (ko) | 1997-07-14 | 1998-07-14 | Mos 트랜지스터 플래쉬 eprom 디바이스의 제조에서 실리콘 산화물의 이방성 화학 에칭 공정의 개선 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6110781A (https=) |
| EP (1) | EP0893820A3 (https=) |
| KR (1) | KR19990013849A (https=) |
| IT (1) | IT1293535B1 (https=) |
| SG (1) | SG71131A1 (https=) |
| TW (1) | TW480620B (https=) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100393865B1 (ko) * | 2000-08-11 | 2003-09-06 | 가부시끼가이샤 도시바 | 불휘발성 반도체 기억 장치 |
| KR100607322B1 (ko) * | 1999-06-30 | 2006-07-28 | 주식회사 하이닉스반도체 | 플래쉬 이이피롬 셀의 제조 방법 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101024252B1 (ko) * | 2003-10-30 | 2011-03-29 | 주식회사 하이닉스반도체 | 반도체소자 제조 방법 |
| US7276755B2 (en) * | 2005-05-02 | 2007-10-02 | Advanced Micro Devices, Inc. | Integrated circuit and method of manufacture |
| CN105070718B (zh) * | 2015-08-18 | 2019-01-04 | 上海华虹宏力半导体制造有限公司 | 一种降低sonos存储器串联电阻的方法 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5275972A (en) * | 1990-02-19 | 1994-01-04 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating a semiconductor integrated circuit device including the self-aligned formation of a contact window |
| US5019879A (en) * | 1990-03-15 | 1991-05-28 | Chiu Te Long | Electrically-flash-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area |
| TW203148B (https=) * | 1991-03-27 | 1993-04-01 | American Telephone & Telegraph | |
| JP3259349B2 (ja) * | 1992-06-09 | 2002-02-25 | ソニー株式会社 | 不揮発性半導体装置及びその製造方法 |
| US5270234A (en) * | 1992-10-30 | 1993-12-14 | International Business Machines Corporation | Deep submicron transistor fabrication method |
| JP2982580B2 (ja) * | 1993-10-07 | 1999-11-22 | 日本電気株式会社 | 不揮発性半導体装置の製造方法 |
| US5467308A (en) * | 1994-04-05 | 1995-11-14 | Motorola Inc. | Cross-point eeprom memory array |
| JP2891205B2 (ja) * | 1996-10-21 | 1999-05-17 | 日本電気株式会社 | 半導体集積回路の製造方法 |
| US5766992A (en) * | 1997-04-11 | 1998-06-16 | Taiwan Semiconductor Manufacturing Company Ltd. | Process for integrating a MOSFET device, using silicon nitride spacers and a self-aligned contact structure, with a capacitor structure |
-
1997
- 1997-07-14 IT IT97RM000430A patent/IT1293535B1/it active IP Right Grant
-
1998
- 1998-07-13 SG SG1998001761A patent/SG71131A1/en unknown
- 1998-07-14 KR KR1019980028387A patent/KR19990013849A/ko not_active Ceased
- 1998-07-14 US US09/115,305 patent/US6110781A/en not_active Expired - Lifetime
- 1998-07-14 EP EP98305602A patent/EP0893820A3/en not_active Withdrawn
- 1998-08-14 TW TW087113375A patent/TW480620B/zh not_active IP Right Cessation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100607322B1 (ko) * | 1999-06-30 | 2006-07-28 | 주식회사 하이닉스반도체 | 플래쉬 이이피롬 셀의 제조 방법 |
| KR100393865B1 (ko) * | 2000-08-11 | 2003-09-06 | 가부시끼가이샤 도시바 | 불휘발성 반도체 기억 장치 |
Also Published As
| Publication number | Publication date |
|---|---|
| ITRM970430A1 (it) | 1999-01-14 |
| US6110781A (en) | 2000-08-29 |
| ITRM970430A0 (https=) | 1997-07-14 |
| IT1293535B1 (it) | 1999-03-01 |
| EP0893820A2 (en) | 1999-01-27 |
| EP0893820A3 (en) | 2003-10-29 |
| SG71131A1 (en) | 2000-03-21 |
| TW480620B (en) | 2002-03-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19980714 |
|
| PG1501 | Laying open of application | ||
| A201 | Request for examination | ||
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20030714 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19980714 Comment text: Patent Application |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20050427 Patent event code: PE09021S01D |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 20070611 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20050427 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |