KR102229384B1 - 다층 전자 기판의 z-축 상호 연결 구조물 - Google Patents

다층 전자 기판의 z-축 상호 연결 구조물 Download PDF

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KR102229384B1
KR102229384B1 KR1020157025261A KR20157025261A KR102229384B1 KR 102229384 B1 KR102229384 B1 KR 102229384B1 KR 1020157025261 A KR1020157025261 A KR 1020157025261A KR 20157025261 A KR20157025261 A KR 20157025261A KR 102229384 B1 KR102229384 B1 KR 102229384B1
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South Korea
Prior art keywords
axis interconnect
axis
electronic substrate
electronic
conductive paste
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KR20160003635A (ko
Inventor
크리스토퍼 에이 헌레스
캉 두이 트란
캐서린 에이 시어러
케네스 씨 홀콤
지 델버트 프리젠
Original Assignee
오르멧 서키츠 인코퍼레이티드
인테그랄 테크놀러지, 인코퍼레이티드
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Publication of KR20160003635A publication Critical patent/KR20160003635A/ko
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1194—Thermal treatment leading to a different chemical state of a material, e.g. annealing for stress-relief, aging

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
KR1020157025261A 2013-02-15 2014-02-18 다층 전자 기판의 z-축 상호 연결 구조물 Active KR102229384B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201361765250P 2013-02-15 2013-02-15
US61/765,250 2013-02-15
PCT/US2014/016999 WO2014127381A1 (en) 2013-02-15 2014-02-18 Structures for z-axis interconnection of multilayer electronic substrates

Publications (2)

Publication Number Publication Date
KR20160003635A KR20160003635A (ko) 2016-01-11
KR102229384B1 true KR102229384B1 (ko) 2021-03-18

Family

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Family Applications (1)

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KR1020157025261A Active KR102229384B1 (ko) 2013-02-15 2014-02-18 다층 전자 기판의 z-축 상호 연결 구조물

Country Status (4)

Country Link
US (1) US9545017B2 (enExample)
JP (1) JP6423369B2 (enExample)
KR (1) KR102229384B1 (enExample)
WO (1) WO2014127381A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024112064A1 (ko) * 2022-11-23 2024-05-30 한국전자기술연구원 일괄적층형 다층 폴리이미드 회로배선기판 및 그의 제조방법

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11440142B2 (en) 2012-11-16 2022-09-13 Ormet Circuits, Inc. Alternative compositions for high temperature soldering applications
WO2016100470A1 (en) * 2014-12-17 2016-06-23 Alpha Metals, Inc. Method for die and clip attachment
US9831201B2 (en) 2015-03-11 2017-11-28 Guy F. Burgess Methods for forming pillar bumps on semiconductor wafers
CN205282448U (zh) * 2015-05-28 2016-06-01 意法半导体股份有限公司 表面安装类型半导体器件
CN111263535A (zh) * 2015-07-15 2020-06-09 印刷电路板公司 制造印刷电路板的方法
ITUB20153344A1 (it) * 2015-09-02 2017-03-02 St Microelectronics Srl Modulo di potenza elettronico con migliorata dissipazione termica e relativo metodo di fabbricazione
WO2018030262A1 (ja) * 2016-08-09 2018-02-15 株式会社村田製作所 モジュール部品の製造方法
JP6810617B2 (ja) * 2017-01-16 2021-01-06 富士通インターコネクトテクノロジーズ株式会社 回路基板、回路基板の製造方法及び電子装置
US10178755B2 (en) * 2017-05-09 2019-01-08 Unimicron Technology Corp. Circuit board stacked structure and method for forming the same
EP3419390A1 (en) * 2017-06-21 2018-12-26 Heraeus Deutschland GmbH & Co. KG Thick-film paste mediated ceramics bonded with metal or metal hybrid foils and vias
US10902769B2 (en) 2017-07-12 2021-01-26 Facebook Technologies, Llc Multi-layer fabrication for pixels with calibration compensation
US10733930B2 (en) * 2017-08-23 2020-08-04 Facebook Technologies, Llc Interposer for multi-layer display architecture
US11167375B2 (en) 2018-08-10 2021-11-09 The Research Foundation For The State University Of New York Additive manufacturing processes and additively manufactured products
JP7134803B2 (ja) * 2018-09-19 2022-09-12 株式会社東芝 プリント基板
CN110783726A (zh) * 2018-11-09 2020-02-11 广州方邦电子股份有限公司 柔性连接器及制作方法
CN110783727A (zh) * 2018-11-09 2020-02-11 广州方邦电子股份有限公司 一种连接器及制作方法
CN110783728A (zh) * 2018-11-09 2020-02-11 广州方邦电子股份有限公司 一种柔性连接器及制作方法
CN110783742A (zh) * 2018-11-09 2020-02-11 广州方邦电子股份有限公司 连接器及制作方法
US11195789B2 (en) * 2018-11-30 2021-12-07 International Business Machines Corporation Integrated circuit module with a structurally balanced package using a bottom side interposer
CN110797686A (zh) * 2019-01-30 2020-02-14 广州方邦电子股份有限公司 一种集成器件
WO2020179874A1 (ja) * 2019-03-06 2020-09-10 日立化成株式会社 電子部品装置を製造する方法
US12262482B2 (en) 2019-05-07 2025-03-25 AT&SAustria Technologie&Systemtechnik Aktiengesellschaft Method of manufacturing component carrier and component carrier intermediate product
EP3736852A1 (en) 2019-05-07 2020-11-11 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Aligning component carrier structure with known-good sections and critical section with other component carrier with components and dummies
JP7384934B2 (ja) * 2019-05-28 2023-11-21 リキッド ワイヤ インコーポレイテッド 異種材料間の連続した相互接続部
US11887962B2 (en) * 2020-06-16 2024-01-30 Intel Corporation Microelectronic structures including bridges
CN112164677A (zh) * 2020-08-25 2021-01-01 珠海越亚半导体股份有限公司 一种线路预排布散热嵌埋封装结构及其制造方法
CN112867243A (zh) * 2021-01-06 2021-05-28 英韧科技(上海)有限公司 多层电路板
EP4040926A1 (en) 2021-02-09 2022-08-10 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carriers connected by staggered interconnect elements
CN114980572A (zh) * 2021-02-25 2022-08-30 深南电路股份有限公司 一种软硬结合电路板及加工方法
KR102537710B1 (ko) * 2021-05-28 2023-05-31 (주)티에스이 일괄 접합 방식의 다층 회로기판 및 그 제조 방법
KR20220160967A (ko) * 2021-05-28 2022-12-06 (주)티에스이 이종 재질의 다층 회로기판 및 그 제조 방법
EP4099807A1 (en) * 2021-06-01 2022-12-07 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier interconnection and manufacturing method
CN116939950A (zh) * 2022-04-08 2023-10-24 Dsbj私人有限公司 在内部铜焊盘上设有阻焊层的电路板

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3705370B2 (ja) * 1995-04-11 2005-10-12 日立化成工業株式会社 多層プリント配線板の製造方法
US6163957A (en) * 1998-11-13 2000-12-26 Fujitsu Limited Multilayer laminated substrates with high density interconnects and methods of making the same
US6326555B1 (en) * 1999-02-26 2001-12-04 Fujitsu Limited Method and structure of z-connected laminated substrate for high density electronic packaging
US6638607B1 (en) * 2002-10-30 2003-10-28 International Business Machines Corporation Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
JP2007129124A (ja) * 2005-11-07 2007-05-24 Matsushita Electric Ind Co Ltd 多層プリント配線基板及びその製造方法
JP4073945B1 (ja) * 2007-01-12 2008-04-09 新光電気工業株式会社 多層配線基板の製造方法
JP5756922B2 (ja) * 2011-05-24 2015-07-29 パナソニックＩｐマネジメント株式会社 樹脂組成物、樹脂ワニス、プリプレグ、金属張積層板、及びプリント配線板
WO2013023101A1 (en) * 2011-08-10 2013-02-14 Cac, Inc. Multiple layer z-axis interconnect apparatus and method of use

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024112064A1 (ko) * 2022-11-23 2024-05-30 한국전자기술연구원 일괄적층형 다층 폴리이미드 회로배선기판 및 그의 제조방법

Also Published As

Publication number Publication date
KR20160003635A (ko) 2016-01-11
WO2014127381A1 (en) 2014-08-21
US9545017B2 (en) 2017-01-10
US20140231126A1 (en) 2014-08-21
JP6423369B2 (ja) 2018-11-14
JP2016510169A (ja) 2016-04-04

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