KR101768959B1 - 인쇄회로보드를 이용한 반도체 패키지 - Google Patents

인쇄회로보드를 이용한 반도체 패키지 Download PDF

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Publication number
KR101768959B1
KR101768959B1 KR1020110066446A KR20110066446A KR101768959B1 KR 101768959 B1 KR101768959 B1 KR 101768959B1 KR 1020110066446 A KR1020110066446 A KR 1020110066446A KR 20110066446 A KR20110066446 A KR 20110066446A KR 101768959 B1 KR101768959 B1 KR 101768959B1
Authority
KR
South Korea
Prior art keywords
base substrate
shape
semiconductor chip
printed circuit
circuit board
Prior art date
Application number
KR1020110066446A
Other languages
English (en)
Korean (ko)
Other versions
KR20120100671A (ko
Inventor
치우 유안
두 마후아
후앙 유카이
꾸 리친
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to US13/350,203 priority Critical patent/US8766100B2/en
Publication of KR20120100671A publication Critical patent/KR20120100671A/ko
Application granted granted Critical
Publication of KR101768959B1 publication Critical patent/KR101768959B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)
KR1020110066446A 2011-03-02 2011-07-05 인쇄회로보드를 이용한 반도체 패키지 KR101768959B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/350,203 US8766100B2 (en) 2011-03-02 2012-01-13 Printed circuit board and semiconductor package using the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201110056450.9A CN102655715B (zh) 2011-03-02 2011-03-02 柔性印刷电路板及其制造方法
CN201110056450.9 2011-03-02

Publications (2)

Publication Number Publication Date
KR20120100671A KR20120100671A (ko) 2012-09-12
KR101768959B1 true KR101768959B1 (ko) 2017-08-17

Family

ID=46731221

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020110066446A KR101768959B1 (ko) 2011-03-02 2011-07-05 인쇄회로보드를 이용한 반도체 패키지

Country Status (2)

Country Link
KR (1) KR101768959B1 (zh)
CN (1) CN102655715B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103904552A (zh) * 2012-12-26 2014-07-02 鸿富锦精密工业（深圳）有限公司 投影用激光芯片封装结构
CN106847713B (zh) * 2016-12-29 2019-03-01 清华大学 卷对卷制作扇出型封装结构的方法和扇出型封装结构
CN206640776U (zh) * 2017-02-13 2017-11-14 歌尔股份有限公司 一种发声装置中的振动系统及发声装置
CN109830467B (zh) * 2017-11-23 2024-03-29 科大国盾量子技术股份有限公司 一种应用于量子通信设备的二极管管夹及温控装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010074194A (ja) * 2009-12-28 2010-04-02 Nec Electronics Corp 半導体装置およびその製造方法
JP2010219451A (ja) * 2009-03-18 2010-09-30 Sumitomo Bakelite Co Ltd 半導体素子封止体の製造方法および半導体パッケージの製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3907461B2 (ja) * 2001-12-03 2007-04-18 シャープ株式会社 半導体モジュールの製造方法
US20090108436A1 (en) * 2007-10-31 2009-04-30 Toshio Fujii Semiconductor package
JP2009123843A (ja) * 2007-11-13 2009-06-04 Toshiba Corp フレキシブルプリント基板用ベースフィルム、フレキシブルプリント基板、フレキシブルプリント基板の製造方法及び電子機器

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010219451A (ja) * 2009-03-18 2010-09-30 Sumitomo Bakelite Co Ltd 半導体素子封止体の製造方法および半導体パッケージの製造方法
JP2010074194A (ja) * 2009-12-28 2010-04-02 Nec Electronics Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
CN102655715A (zh) 2012-09-05
CN102655715B (zh) 2016-05-11
KR20120100671A (ko) 2012-09-12

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