KR101398404B1 - 기계적으로 분리된 리드 부착물을 갖는 플라스틱오버몰딩된 패키지들 - Google Patents

기계적으로 분리된 리드 부착물을 갖는 플라스틱오버몰딩된 패키지들 Download PDF

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KR101398404B1
KR101398404B1 KR1020070079027A KR20070079027A KR101398404B1 KR 101398404 B1 KR101398404 B1 KR 101398404B1 KR 1020070079027 A KR1020070079027 A KR 1020070079027A KR 20070079027 A KR20070079027 A KR 20070079027A KR 101398404 B1 KR101398404 B1 KR 101398404B1
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South Korea
Prior art keywords
polymeric material
chimney
heat sinks
package
overmold
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Korean (ko)
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KR20080015725A (ko
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로버트 비. 크리스펠
로버트 스콧 키스틀러
존 더블유. 오센바치
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에이저 시스템즈 엘엘시
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020070079027A 2006-08-16 2007-08-07 기계적으로 분리된 리드 부착물을 갖는 플라스틱오버몰딩된 패키지들 Active KR101398404B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/505,152 US7423341B2 (en) 2006-08-16 2006-08-16 Plastic overmolded packages with mechanically decoupled lid attach attachment
US11/505,152 2006-08-16

Publications (2)

Publication Number Publication Date
KR20080015725A KR20080015725A (ko) 2008-02-20
KR101398404B1 true KR101398404B1 (ko) 2014-05-26

Family

ID=39095325

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070079027A Active KR101398404B1 (ko) 2006-08-16 2007-08-07 기계적으로 분리된 리드 부착물을 갖는 플라스틱오버몰딩된 패키지들

Country Status (4)

Country Link
US (2) US7423341B2 (OSRAM)
JP (1) JP5121353B2 (OSRAM)
KR (1) KR101398404B1 (OSRAM)
CN (1) CN101127349B (OSRAM)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7423341B2 (en) * 2006-08-16 2008-09-09 Agere Systems Inc. Plastic overmolded packages with mechanically decoupled lid attach attachment
KR101221807B1 (ko) * 2006-12-29 2013-01-14 페어차일드코리아반도체 주식회사 전력 소자 패키지
WO2009022729A1 (ja) 2007-08-10 2009-02-19 Nissan Motor Co., Ltd. 可変動弁装置
US7781682B2 (en) * 2008-03-31 2010-08-24 Intel Corporation Methods of fabricating multichip packages and structures formed thereby
US7829390B2 (en) * 2008-11-20 2010-11-09 Azurewave Technologies, Inc. Packaging structure of SIP and a manufacturing method thereof
US8362607B2 (en) * 2009-06-03 2013-01-29 Honeywell International Inc. Integrated circuit package including a thermally and electrically conductive package lid
FR2968126A1 (fr) * 2010-11-29 2012-06-01 St Microelectronics Grenoble 2 Boitier semi-conducteur a via thermique et procédé de fabrication
US9562534B2 (en) * 2012-05-04 2017-02-07 Ghsp, Inc. In-line dual pump and motor with control device
US9202772B2 (en) * 2013-02-28 2015-12-01 Altera Corporation Heat pipe in overmolded flip chip package
US20170356640A1 (en) 2016-06-10 2017-12-14 Innotec, Corp. Illumination assembly including thermal energy management
KR102617088B1 (ko) 2019-09-18 2023-12-26 삼성전자주식회사 반도체 패키지
US20230137512A1 (en) * 2021-11-03 2023-05-04 Western Digital Technologies, Inc. Stacked ssd semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758254A (ja) * 1993-08-19 1995-03-03 Fujitsu Ltd マルチチップモジュール及びその製造方法
JPH0964252A (ja) * 1995-08-25 1997-03-07 Hitachi Ltd 半導体装置
JP2004289059A (ja) 2003-03-25 2004-10-14 Denso Corp 半導体装置

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JPH06132425A (ja) * 1992-10-22 1994-05-13 Kyocera Corp 半導体装置
US5886408A (en) * 1994-09-08 1999-03-23 Fujitsu Limited Multi-chip semiconductor device
JPH0878618A (ja) * 1994-09-08 1996-03-22 Fujitsu Ltd マルチチップモジュール及びその製造方法
US5610442A (en) * 1995-03-27 1997-03-11 Lsi Logic Corporation Semiconductor device package fabrication method and apparatus
US5587882A (en) * 1995-08-30 1996-12-24 Hewlett-Packard Company Thermal interface for a heat sink and a plurality of integrated circuits mounted on a substrate
US6238954B1 (en) * 1999-09-28 2001-05-29 Intel Corporation COF packaged semiconductor
US6535388B1 (en) * 2001-10-04 2003-03-18 Intel Corporation Wirebonded microelectronic packages including heat dissipation devices for heat removal from active surfaces thereof
US6987032B1 (en) * 2002-07-19 2006-01-17 Asat Ltd. Ball grid array package and process for manufacturing same
US7153725B2 (en) * 2004-01-27 2006-12-26 St Assembly Test Services Ltd. Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor
EP1741136A2 (fr) * 2004-04-13 2007-01-10 SA Intexys Procede de fabrication de circuits electroniques et optoelectroniques
TWI246757B (en) * 2004-10-27 2006-01-01 Siliconware Precision Industries Co Ltd Semiconductor package with heat sink and fabrication method thereof
US7332823B2 (en) * 2005-12-15 2008-02-19 Intel Corporation Providing a metal layer in a semiconductor package
US7332807B2 (en) * 2005-12-30 2008-02-19 Intel Corporation Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same
US7423341B2 (en) * 2006-08-16 2008-09-09 Agere Systems Inc. Plastic overmolded packages with mechanically decoupled lid attach attachment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758254A (ja) * 1993-08-19 1995-03-03 Fujitsu Ltd マルチチップモジュール及びその製造方法
JPH0964252A (ja) * 1995-08-25 1997-03-07 Hitachi Ltd 半導体装置
JP2004289059A (ja) 2003-03-25 2004-10-14 Denso Corp 半導体装置

Also Published As

Publication number Publication date
US7632717B2 (en) 2009-12-15
CN101127349A (zh) 2008-02-20
JP2008047918A (ja) 2008-02-28
CN101127349B (zh) 2011-11-16
US20080042262A1 (en) 2008-02-21
US7423341B2 (en) 2008-09-09
KR20080015725A (ko) 2008-02-20
US20080311700A1 (en) 2008-12-18
JP5121353B2 (ja) 2013-01-16

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