KR101326335B1 - 데이터 프로세싱 회로, 데이터 프로세싱 시스템 및 방법 - Google Patents

데이터 프로세싱 회로, 데이터 프로세싱 시스템 및 방법 Download PDF

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KR101326335B1
KR101326335B1 KR1020100065917A KR20100065917A KR101326335B1 KR 101326335 B1 KR101326335 B1 KR 101326335B1 KR 1020100065917 A KR1020100065917 A KR 1020100065917A KR 20100065917 A KR20100065917 A KR 20100065917A KR 101326335 B1 KR101326335 B1 KR 101326335B1
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data
decoder
circuit
scalar value
data processing
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KR20110116954A (ko
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샤오후아 양
밀로스 이브코빅
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엘에스아이 코포레이션
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/658—Scaling by multiplication or division
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6591—Truncation, saturation and clamping

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
KR1020100065917A 2010-04-19 2010-07-08 데이터 프로세싱 회로, 데이터 프로세싱 시스템 및 방법 Expired - Fee Related KR101326335B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/763,050 2010-04-19
US12/763,050 US8418019B2 (en) 2010-04-19 2010-04-19 Systems and methods for dynamic scaling in a data decoding system

Publications (2)

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KR20110116954A KR20110116954A (ko) 2011-10-26
KR101326335B1 true KR101326335B1 (ko) 2013-11-11

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US (2) US8418019B2 (enExample)
EP (1) EP2381581A1 (enExample)
JP (1) JP5657404B2 (enExample)
KR (1) KR101326335B1 (enExample)
CN (1) CN102223203B (enExample)
TW (1) TWI437825B (enExample)

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