KR101323222B1 - 기판상에 형성되는 구조체의 열적 프로세싱을 위한 장치 및 방법 - Google Patents

기판상에 형성되는 구조체의 열적 프로세싱을 위한 장치 및 방법 Download PDF

Info

Publication number
KR101323222B1
KR101323222B1 KR1020107024018A KR20107024018A KR101323222B1 KR 101323222 B1 KR101323222 B1 KR 101323222B1 KR 1020107024018 A KR1020107024018 A KR 1020107024018A KR 20107024018 A KR20107024018 A KR 20107024018A KR 101323222 B1 KR101323222 B1 KR 101323222B1
Authority
KR
South Korea
Prior art keywords
substrate
region
energy
thermal processing
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020107024018A
Other languages
English (en)
Korean (ko)
Other versions
KR20100133454A (ko
Inventor
아브힐라쉬 마유어
마크 얌
아지트 발라크리쉬나
폴 카레이
딘 제닝스
스티븐 모파트
윌리엄 샤퍼
알렉산더 엔. 러너
티모시 엔. 토마스
아론 무이어 헌터
Original Assignee
어플라이드 머티어리얼스, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/459,856 external-priority patent/US20070212859A1/en
Application filed by 어플라이드 머티어리얼스, 인코포레이티드 filed Critical 어플라이드 머티어리얼스, 인코포레이티드
Publication of KR20100133454A publication Critical patent/KR20100133454A/ko
Application granted granted Critical
Publication of KR101323222B1 publication Critical patent/KR101323222B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H10D84/0133—Manufacturing common source or drain regions between multiple IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020107024018A 2006-03-08 2007-02-23 기판상에 형성되는 구조체의 열적 프로세싱을 위한 장치 및 방법 Expired - Fee Related KR101323222B1 (ko)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US78074506P 2006-03-08 2006-03-08
US60/780,745 2006-03-08
US11/459,856 US20070212859A1 (en) 2006-03-08 2006-07-25 Method of thermal processing structures formed on a substrate
US11/459,856 2006-07-25
US11/459,852 2006-07-25
US11/459,852 US20070221640A1 (en) 2006-03-08 2006-07-25 Apparatus for thermal processing structures formed on a substrate
US11/459,847 2006-07-25
US11/459,847 US7569463B2 (en) 2006-03-08 2006-07-25 Method of thermal processing structures formed on a substrate
PCT/US2007/062672 WO2007103643A2 (en) 2006-03-08 2007-02-23 Method and apparatus for thermal processing structures formed on a substrate

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
KR1020087024646A Division KR101113533B1 (ko) 2006-03-08 2007-02-23 기판상에 형성되는 구조체의 열적 처리를 위한 장치 및 방법

Publications (2)

Publication Number Publication Date
KR20100133454A KR20100133454A (ko) 2010-12-21
KR101323222B1 true KR101323222B1 (ko) 2013-10-30

Family

ID=38475646

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020107024018A Expired - Fee Related KR101323222B1 (ko) 2006-03-08 2007-02-23 기판상에 형성되는 구조체의 열적 프로세싱을 위한 장치 및 방법
KR1020087024646A Expired - Fee Related KR101113533B1 (ko) 2006-03-08 2007-02-23 기판상에 형성되는 구조체의 열적 처리를 위한 장치 및 방법

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020087024646A Expired - Fee Related KR101113533B1 (ko) 2006-03-08 2007-02-23 기판상에 형성되는 구조체의 열적 처리를 위한 장치 및 방법

Country Status (4)

Country Link
EP (1) EP1992013A2 (enExample)
JP (1) JP5558006B2 (enExample)
KR (2) KR101323222B1 (enExample)
WO (1) WO2007103643A2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090120924A1 (en) * 2007-11-08 2009-05-14 Stephen Moffatt Pulse train annealing method and apparatus
US9498845B2 (en) 2007-11-08 2016-11-22 Applied Materials, Inc. Pulse train annealing method and apparatus
US9012315B2 (en) * 2013-08-09 2015-04-21 Taiwan Semiconductor Manufacturing Company Limited Methods and systems for dopant activation using microwave radiation
KR102216675B1 (ko) * 2014-06-12 2021-02-18 삼성디스플레이 주식회사 디스플레이 패널의 리페어 장치 및 디스플레이 패널의 리페어 방법
EP3611757A1 (en) * 2018-08-16 2020-02-19 Laser Systems & Solutions of Europe Method for forming a doped region on a semiconductor material

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010074629A (ko) * 1998-08-27 2001-08-04 마클 데이빗 에이. 크기가 축소된 집적 회로의 제조에 사용하기에 적합한가스 주입 레이저 어닐링 방법
US20040188396A1 (en) 2002-11-06 2004-09-30 Somit Talwar Laser scanning apparatus and methods for thermal processing
US20050087893A1 (en) 1999-10-25 2005-04-28 Chung Seung-Pil Method of removing oxide layer and semiconductor manufacturing apparatus for removing oxide layer
US20050103998A1 (en) 2003-09-29 2005-05-19 Somit Talwar Laser thermal annealing of lightly doped silicon substrates

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696835A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Manufacture of semiconductor device
JPS5727035A (en) * 1980-07-25 1982-02-13 Hitachi Ltd Manufacture of semiconductor device
GB8515814D0 (en) * 1985-06-21 1985-07-24 British Telecomm Fabrication of optical waveguides
US4849371A (en) * 1986-12-22 1989-07-18 Motorola Inc. Monocrystalline semiconductor buried layers for electrical contacts to semiconductor devices
US5182170A (en) * 1989-09-05 1993-01-26 Board Of Regents, The University Of Texas System Method of producing parts by selective beam interaction of powder with gas phase reactant
JP3326654B2 (ja) * 1994-05-02 2002-09-24 ソニー株式会社 表示用半導体チップの製造方法
KR20000048110A (ko) * 1998-12-15 2000-07-25 카네코 히사시 고체촬상장치 및 그 제조방법
CN1194380C (zh) * 2000-04-24 2005-03-23 北京师范大学 绝缘体上单晶硅(soi)材料的制造方法
US6486066B2 (en) * 2001-02-02 2002-11-26 Matrix Semiconductor, Inc. Method of generating integrated circuit feature layout for improved chemical mechanical polishing
US6902966B2 (en) * 2001-10-25 2005-06-07 Advanced Micro Devices, Inc. Low-temperature post-dopant activation process
AU2002348835A1 (en) * 2001-11-30 2003-06-10 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device
JP2003229568A (ja) * 2002-02-04 2003-08-15 Hitachi Ltd 半導体装置の製造方法および半導体装置
JP2004363355A (ja) * 2003-06-05 2004-12-24 Hitachi Ltd 半導体装置及びその製造方法
DE60330965D1 (de) * 2003-10-17 2010-03-04 Imec Verfahren zur Herstellung eines Halbleitersubstrats mit einer Schichtstruktur von aktivierten Dotierungsstoffen
JP4700324B2 (ja) * 2003-12-25 2011-06-15 シルトロニック・ジャパン株式会社 半導体基板の製造方法
JP2007535163A (ja) * 2004-04-27 2007-11-29 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 溶融技術により有機半導体デバイスを形成する方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010074629A (ko) * 1998-08-27 2001-08-04 마클 데이빗 에이. 크기가 축소된 집적 회로의 제조에 사용하기에 적합한가스 주입 레이저 어닐링 방법
US20050087893A1 (en) 1999-10-25 2005-04-28 Chung Seung-Pil Method of removing oxide layer and semiconductor manufacturing apparatus for removing oxide layer
US20040188396A1 (en) 2002-11-06 2004-09-30 Somit Talwar Laser scanning apparatus and methods for thermal processing
US20050103998A1 (en) 2003-09-29 2005-05-19 Somit Talwar Laser thermal annealing of lightly doped silicon substrates

Also Published As

Publication number Publication date
KR101113533B1 (ko) 2012-02-29
WO2007103643A2 (en) 2007-09-13
KR20100133454A (ko) 2010-12-21
WO2007103643A3 (en) 2008-05-08
KR20080104183A (ko) 2008-12-01
JP2009529245A (ja) 2009-08-13
WO2007103643B1 (en) 2008-06-26
JP5558006B2 (ja) 2014-07-23
EP1992013A2 (en) 2008-11-19

Similar Documents

Publication Publication Date Title
US10840100B2 (en) Method of thermal processing structures formed on a substrate
US8247317B2 (en) Methods of solid phase recrystallization of thin film using pulse train annealing method
TWI426578B (zh) 脈衝序列退火方法及其設備
CN107123597B (zh) 脉冲序列退火方法和设备
KR101323222B1 (ko) 기판상에 형성되는 구조체의 열적 프로세싱을 위한 장치 및 방법

Legal Events

Date Code Title Description
A107 Divisional application of patent
PA0104 Divisional application for international application

St.27 status event code: A-0-1-A10-A16-div-PA0104

St.27 status event code: A-0-1-A10-A18-div-PA0104

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

Fee payment year number: 1

St.27 status event code: A-2-2-U10-U12-oth-PR1002

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20160929

Year of fee payment: 4

PR1001 Payment of annual fee

Fee payment year number: 4

St.27 status event code: A-4-4-U10-U11-oth-PR1001

FPAY Annual fee payment

Payment date: 20170929

Year of fee payment: 5

PR1001 Payment of annual fee

Fee payment year number: 5

St.27 status event code: A-4-4-U10-U11-oth-PR1001

FPAY Annual fee payment

Payment date: 20181015

Year of fee payment: 6

PR1001 Payment of annual fee

Fee payment year number: 6

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PC1903 Unpaid annual fee

Not in force date: 20191024

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

St.27 status event code: A-4-4-U10-U13-oth-PC1903

PC1903 Unpaid annual fee

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20191024

St.27 status event code: N-4-6-H10-H13-oth-PC1903