KR101234266B1 - 세라믹 기판 제조 방법 및 세라믹 기판을 이용한 반도체 패키지 - Google Patents

세라믹 기판 제조 방법 및 세라믹 기판을 이용한 반도체 패키지 Download PDF

Info

Publication number
KR101234266B1
KR101234266B1 KR1020100100445A KR20100100445A KR101234266B1 KR 101234266 B1 KR101234266 B1 KR 101234266B1 KR 1020100100445 A KR1020100100445 A KR 1020100100445A KR 20100100445 A KR20100100445 A KR 20100100445A KR 101234266 B1 KR101234266 B1 KR 101234266B1
Authority
KR
South Korea
Prior art keywords
ceramic substrate
ceramic
cavity
ceramic material
substrate
Prior art date
Application number
KR1020100100445A
Other languages
English (en)
Korean (ko)
Other versions
KR20110122620A (ko
Inventor
이길선
단성백
이명렬
Original Assignee
(주) 아모엘이디
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by (주) 아모엘이디 filed Critical (주) 아모엘이디
Priority to TW100115576A priority Critical patent/TWI433359B/zh
Publication of KR20110122620A publication Critical patent/KR20110122620A/ko
Application granted granted Critical
Publication of KR101234266B1 publication Critical patent/KR101234266B1/ko

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Led Device Packages (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
KR1020100100445A 2010-05-04 2010-10-14 세라믹 기판 제조 방법 및 세라믹 기판을 이용한 반도체 패키지 KR101234266B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW100115576A TWI433359B (zh) 2010-05-04 2011-05-04 製造陶瓷基板之方法及使用該陶瓷基板之半導體封裝件

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020100041711 2010-05-04
KR20100041711 2010-05-04

Publications (2)

Publication Number Publication Date
KR20110122620A KR20110122620A (ko) 2011-11-10
KR101234266B1 true KR101234266B1 (ko) 2013-02-18

Family

ID=45393141

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100100445A KR101234266B1 (ko) 2010-05-04 2010-10-14 세라믹 기판 제조 방법 및 세라믹 기판을 이용한 반도체 패키지

Country Status (2)

Country Link
KR (1) KR101234266B1 (zh)
TW (1) TWI433359B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101326664B1 (ko) * 2011-12-07 2013-11-08 (주) 아모엘이디 엘이디 패키지용 기판 제조 방법
CN113964253A (zh) * 2020-12-08 2022-01-21 江苏欧密格光电科技股份有限公司 一种手机led闪光灯结构及其制作工艺

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042745A (ja) * 2005-08-01 2007-02-15 Ngk Spark Plug Co Ltd 発光素子用セラミックパッケージ及びその製造方法
JP2007305844A (ja) * 2006-05-12 2007-11-22 Stanley Electric Co Ltd 発光装置とその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042745A (ja) * 2005-08-01 2007-02-15 Ngk Spark Plug Co Ltd 発光素子用セラミックパッケージ及びその製造方法
JP2007305844A (ja) * 2006-05-12 2007-11-22 Stanley Electric Co Ltd 発光装置とその製造方法

Also Published As

Publication number Publication date
KR20110122620A (ko) 2011-11-10
TW201208137A (en) 2012-02-16
TWI433359B (zh) 2014-04-01

Similar Documents

Publication Publication Date Title
KR101736518B1 (ko) 몰딩된 반사 측벽 코팅을 갖는 ｌｅｄ
TWI446593B (zh) 光電半導體組件之製造方法及光電半導體組件
US9691949B2 (en) Submount based light emitter components and methods
US9673363B2 (en) Reflective mounting substrates for flip-chip mounted horizontal LEDs
US11079094B2 (en) Light emitting device with a light-transmissive member
US20120193661A1 (en) Gap engineering for flip-chip mounted horizontal leds
TWI589037B (zh) 發光裝置
US10490703B2 (en) Light-emitting-device package and production method therefor
US11244931B2 (en) Light emitting device with enhanced color mixing quality
US10797204B2 (en) Submount based light emitter components and methods
KR100836210B1 (ko) 반도체 패키지 및 그의 제조방법
KR101234266B1 (ko) 세라믹 기판 제조 방법 및 세라믹 기판을 이용한 반도체 패키지
WO2017013869A1 (ja) 発光装置及び発光モジュール
US9470402B2 (en) Light-emitting apparatus
KR100863756B1 (ko) 반도체 패키지의 제조방법
JP2008270390A (ja) フロントカバー、発光装置およびフロントカバーの製造方法
KR100979174B1 (ko) 멀티칩 패키지 및 그의 제조방법
WO2017025013A1 (zh) 一种led封装基板
KR101524046B1 (ko) 발광 소자 패키지, 백라이트 유닛, 조명 장치 및 발광 소자 패키지의 제작 방법
KR101108598B1 (ko) 고반사 반도체 패키지 제조 방법
JP2016072393A (ja) セラミックスパッケージの製造方法及び発光装置の製造方法

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20160202

Year of fee payment: 4

FPAY Annual fee payment

Payment date: 20170117

Year of fee payment: 5

FPAY Annual fee payment

Payment date: 20180116

Year of fee payment: 6

FPAY Annual fee payment

Payment date: 20190114

Year of fee payment: 7

FPAY Annual fee payment

Payment date: 20200114

Year of fee payment: 8