KR101163264B1 - 플라즈마 프로세싱을 사용하여 하이-k 층을 포함하는 게이트 유전체 스택을 변형하는 방법 - Google Patents

플라즈마 프로세싱을 사용하여 하이-k 층을 포함하는 게이트 유전체 스택을 변형하는 방법 Download PDF

Info

Publication number
KR101163264B1
KR101163264B1 KR1020077003092A KR20077003092A KR101163264B1 KR 101163264 B1 KR101163264 B1 KR 101163264B1 KR 1020077003092 A KR1020077003092 A KR 1020077003092A KR 20077003092 A KR20077003092 A KR 20077003092A KR 101163264 B1 KR101163264 B1 KR 101163264B1
Authority
KR
South Korea
Prior art keywords
plasma
layer
gate dielectric
dielectric stack
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020077003092A
Other languages
English (en)
Korean (ko)
Other versions
KR20080009675A (ko
Inventor
히로아키 니이미
루이지 콜롬보
코지 시모무라
타쿠야 수가와라
타츠오 마츠도
Original Assignee
텍사스 인스트루먼츠 인코포레이티드
도쿄엘렉트론가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 텍사스 인스트루먼츠 인코포레이티드, 도쿄엘렉트론가부시키가이샤 filed Critical 텍사스 인스트루먼츠 인코포레이티드
Publication of KR20080009675A publication Critical patent/KR20080009675A/ko
Application granted granted Critical
Publication of KR101163264B1 publication Critical patent/KR101163264B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662Laminate layers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01344Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a nitrogen-containing ambient, e.g. N2O oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6928Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/20Diffusion for doping of insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane

Landscapes

  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020077003092A 2004-08-18 2005-08-11 플라즈마 프로세싱을 사용하여 하이-k 층을 포함하는 게이트 유전체 스택을 변형하는 방법 Expired - Fee Related KR101163264B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/920,990 US7163877B2 (en) 2004-08-18 2004-08-18 Method and system for modifying a gate dielectric stack containing a high-k layer using plasma processing
US10/920,990 2004-08-18
PCT/US2005/028610 WO2006023373A1 (en) 2004-08-18 2005-08-11 A method and system for modifying a gate dielectric stack containing a high-k layer using plasma processing

Publications (2)

Publication Number Publication Date
KR20080009675A KR20080009675A (ko) 2008-01-29
KR101163264B1 true KR101163264B1 (ko) 2012-07-05

Family

ID=35431477

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077003092A Expired - Fee Related KR101163264B1 (ko) 2004-08-18 2005-08-11 플라즈마 프로세싱을 사용하여 하이-k 층을 포함하는 게이트 유전체 스택을 변형하는 방법

Country Status (6)

Country Link
US (1) US7163877B2 (https=)
JP (1) JP4950888B2 (https=)
KR (1) KR101163264B1 (https=)
CN (1) CN100568462C (https=)
TW (1) TWI268553B (https=)
WO (1) WO2006023373A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10797160B2 (en) 2018-01-31 2020-10-06 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005086215A1 (ja) * 2004-03-03 2005-09-15 Tokyo Electron Limited プラズマ処理方法及びコンピュータ記憶媒体
US20070049048A1 (en) * 2005-08-31 2007-03-01 Shahid Rauf Method and apparatus for improving nitrogen profile during plasma nitridation
EP2020911A4 (en) 2006-05-13 2011-07-27 Tensys Medical Inc CONTINUOUS POSITIONING DEVICE AND METHOD
WO2007132884A1 (ja) * 2006-05-17 2007-11-22 Hitachi Kokusai Electric Inc. 半導体装置の製造方法および基板処理装置
WO2009048602A1 (en) 2007-10-12 2009-04-16 Tensys Medical, Inc. Apparatus and methods for non-invasively measuring a patient's arterial blood pressure
US7964515B2 (en) * 2007-12-21 2011-06-21 Tokyo Electron Limited Method of forming high-dielectric constant films for semiconductor devices
US20090233430A1 (en) * 2008-02-19 2009-09-17 Hitachi-Kokusai Electric In. Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, and semiconductor device manufacturing system
US8193586B2 (en) * 2008-08-25 2012-06-05 Taiwan Semiconductor Manufacturing Company, Ltd. Sealing structure for high-K metal gate
US20100044804A1 (en) * 2008-08-25 2010-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Novel high-k metal gate structure and method of making
US8252653B2 (en) 2008-10-21 2012-08-28 Applied Materials, Inc. Method of forming a non-volatile memory having a silicon nitride charge trap layer
US8198671B2 (en) * 2009-04-22 2012-06-12 Applied Materials, Inc. Modification of charge trap silicon nitride with oxygen plasma
US8962454B2 (en) * 2010-11-04 2015-02-24 Tokyo Electron Limited Method of depositing dielectric films using microwave plasma
KR101893471B1 (ko) * 2011-02-15 2018-08-30 어플라이드 머티어리얼스, 인코포레이티드 멀티존 플라즈마 생성을 위한 방법 및 장치
US9655530B2 (en) 2011-04-29 2017-05-23 Tensys Medical, Inc. Apparatus and methods for non-invasively measuring physiologic parameters of one or more subjects
KR101241049B1 (ko) 2011-08-01 2013-03-15 주식회사 플라즈마트 플라즈마 발생 장치 및 플라즈마 발생 방법
KR101246191B1 (ko) * 2011-10-13 2013-03-21 주식회사 윈텔 플라즈마 장치 및 기판 처리 장치
US8890264B2 (en) * 2012-09-26 2014-11-18 Intel Corporation Non-planar III-V field effect transistors with conformal metal gate electrode and nitrogen doping of gate dielectric interface
US9224644B2 (en) * 2012-12-26 2015-12-29 Intermolecular, Inc. Method to control depth profiles of dopants using a remote plasma source
US9343291B2 (en) * 2013-05-15 2016-05-17 Tokyo Electron Limited Method for forming an interfacial layer on a semiconductor using hydrogen plasma
US9331168B2 (en) 2014-01-17 2016-05-03 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacuturing method of the same
CN104821276B (zh) * 2014-01-30 2018-08-10 中芯国际集成电路制造(上海)有限公司 Mos晶体管的制作方法
US20170084464A1 (en) * 2015-09-18 2017-03-23 Tokyo Electron Limited Germanium-containing semiconductor device and method of forming
JP6671166B2 (ja) * 2015-12-15 2020-03-25 東京エレクトロン株式会社 絶縁膜積層体の製造方法
US11152214B2 (en) * 2016-04-20 2021-10-19 International Business Machines Corporation Structures and methods for equivalent oxide thickness scaling on silicon germanium channel or III-V channel of semiconductor device
TWI635539B (zh) * 2017-09-15 2018-09-11 Corremax International Co., Ltd. 高介電常數介電層、其製造方法及執行該方法之多功能設備
CN108735607A (zh) * 2018-05-25 2018-11-02 中国科学院微电子研究所 基于微波等离子体氧化的凹槽mosfet器件的制造方法
US20210057215A1 (en) * 2019-05-03 2021-02-25 Applied Materials, Inc. Treatments to enhance material structures
US12249511B2 (en) * 2019-05-03 2025-03-11 Applied Materials, Inc. Treatments to improve device performance
US11417517B2 (en) * 2019-05-03 2022-08-16 Applied Materials, Inc. Treatments to enhance material structures
TWI837538B (zh) * 2020-11-06 2024-04-01 美商應用材料股份有限公司 增強材料結構的處理
JP7587716B2 (ja) * 2021-03-04 2024-11-20 アプライド マテリアルズ インコーポレイテッド デバイスのパフォーマンスを向上させるための処理

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040009642A1 (en) * 2002-07-10 2004-01-15 Samsung Electronics Co., Ltd. Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05221644A (ja) * 1992-02-13 1993-08-31 Matsushita Electric Ind Co Ltd 酸化タンタル薄膜の製造方法
JP3230901B2 (ja) * 1993-06-22 2001-11-19 株式会社東芝 半導体装置の製造方法及びその製造装置
JPH0964307A (ja) * 1995-08-29 1997-03-07 Hitachi Ltd 酸化物薄膜の熱処理方法
US6709715B1 (en) * 1999-06-17 2004-03-23 Applied Materials Inc. Plasma enhanced chemical vapor deposition of copolymer of parylene N and comonomers with various double bonds
ATE514181T1 (de) * 2000-03-13 2011-07-15 Tadahiro Ohmi Verfahren zur ausbildung eines dielektrischen films
WO2002001622A2 (en) * 2000-06-26 2002-01-03 North Carolina State University Novel non-crystalline oxides for use in microelectronic, optical, and other applications
US6677254B2 (en) 2001-07-23 2004-01-13 Applied Materials, Inc. Processes for making a barrier between a dielectric and a conductor and products produced therefrom
JP4643884B2 (ja) 2002-06-27 2011-03-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
WO2004030049A2 (en) * 2002-09-27 2004-04-08 Tokyo Electron Limited A method and system for etching high-k dielectric materials
US6730566B2 (en) * 2002-10-04 2004-05-04 Texas Instruments Incorporated Method for non-thermally nitrided gate formation for high voltage devices
US6649538B1 (en) * 2002-10-09 2003-11-18 Taiwan Semiconductor Manufacturing Co. Ltd. Method for plasma treating and plasma nitriding gate oxides
US6689675B1 (en) * 2002-10-31 2004-02-10 Intel Corporation Method for making a semiconductor device having a high-k gate dielectric
JP2006505954A (ja) 2002-11-08 2006-02-16 アヴィザ テクノロジー インコーポレイテッド 高k誘電体の窒化物形成
US6787440B2 (en) 2002-12-10 2004-09-07 Intel Corporation Method for making a semiconductor device having an ultra-thin high-k gate dielectric
JP2004228355A (ja) * 2003-01-23 2004-08-12 Seiko Epson Corp 絶縁膜基板の製造方法、絶縁膜基板の製造装置及び絶縁膜基板並びに電気光学装置の製造方法及び電気光学装置
KR20060054387A (ko) * 2003-08-04 2006-05-22 에이에스엠 아메리카, 인코포레이티드 증착 전 게르마늄 표면 처리 방법
JP4280686B2 (ja) * 2004-06-30 2009-06-17 キヤノン株式会社 処理方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040009642A1 (en) * 2002-07-10 2004-01-15 Samsung Electronics Co., Ltd. Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10797160B2 (en) 2018-01-31 2020-10-06 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices

Also Published As

Publication number Publication date
TW200618091A (en) 2006-06-01
US20060040483A1 (en) 2006-02-23
JP2008510319A (ja) 2008-04-03
KR20080009675A (ko) 2008-01-29
CN101006566A (zh) 2007-07-25
JP4950888B2 (ja) 2012-06-13
CN100568462C (zh) 2009-12-09
TWI268553B (en) 2006-12-11
US7163877B2 (en) 2007-01-16
WO2006023373A1 (en) 2006-03-02

Similar Documents

Publication Publication Date Title
KR101163264B1 (ko) 플라즈마 프로세싱을 사용하여 하이-k 층을 포함하는 게이트 유전체 스택을 변형하는 방법
KR102316186B1 (ko) 격리 구조를 위한 스케일링된 라이너 층
JP5042038B2 (ja) 半導体装置を製造する方法
US8021987B2 (en) Method of modifying insulating film
CN101401194B (zh) 使用低能量等离子体系统制造高介电常数晶体管栅极的方法和装置
CN100401478C (zh) 半导体器件的制造方法
CN101048858B (zh) 绝缘膜形成方法及基板处理方法
US7709397B2 (en) Method and system for etching a high-k dielectric material
TWI423333B (zh) 利用低能量電漿系統製造高介電常數電晶體閘極之方法及設備
JP2005150637A (ja) 処理方法及び装置
US10971357B2 (en) Thin film treatment process
TWI459471B (zh) 使用低能量電漿系統製造高介質常數電晶體閘極的方法與設備
US20030194510A1 (en) Methods used in fabricating gates in integrated circuit device structures
US7517812B2 (en) Method and system for forming a nitrided germanium-containing layer using plasma processing
US7517818B2 (en) Method for forming a nitrided germanium-containing layer using plasma processing
TWI621218B (zh) 包含鍺之半導體元件及其形成方法
TWI442474B (zh) 用於在半導體裝置上形成共形氧化層的方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

N231 Notification of change of applicant
PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20150601

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20160527

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20170530

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20180618

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

FPAY Annual fee payment

Payment date: 20190618

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20220630

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20220630

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000