KR101145367B1 - Method of manufacturing capacitor using amorphous carbon - Google Patents

Abstract

The present invention is to provide a method of forming a capacitor that can increase the bottom threshold (Bottom CD) of the storage node while reducing the gap between the storage node separation layer as possible, the method of forming the capacitor of the present invention is an insulating film on the etch stop film Forming a; Forming a primary hole by partially etching the insulating layer in a depth direction by using a first amorphous carbon pattern as an etch barrier; Forming a second amorphous carbon pattern on sidewalls of the primary hole; Forming a secondary hole by wet etching an insulating film on the bottom surface of the primary hole with the second amorphous carbon pattern as an etch barrier in a lateral direction; Etching the remaining portion of the insulating layer on the bottom of the secondary hole to form a third hole exposing the surface of the etching stop layer; Removing the first and second amorphous carbon patterns; Further wet etching the third hole to form a storage node hole having a lower bottom threshold; And forming a storage node in the storage node hole, and the present invention as described above can secure both the gap and the bottom area between the separators, thereby improving the characteristics of the highly integrated capacitor.

Capacitor, Amorphous Carbon, Bottom Threshold, Storage Node Hole

Description

A method of forming a capacitor using an amorphous carbon {METHOD OF MANUFACTURING CAPACITOR USING AMORPHOUS CARBON}

1A illustrates the layout of a storage node according to the prior art.

1B is a cross-sectional view taken along line II ′ of FIG. 1A;

2A to 2J are cross-sectional views illustrating a method of forming a capacitor according to an embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS

21 semiconductor substrate 22 interlayer insulating film

23: storage node contact 24: stop nitride film

25: PSG 26: PETEOS

27A: Amorphous Carbon Pattern 29A: Amorphous Carbon Spacer Pattern

30: Storage node

302: Storage Node Hall

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a method of forming a capacitor using amorphous carbon.

Recently, as the design rule of DRAM becomes smaller, the cell size continues to decrease, and accordingly, the height of the capacitor continues to increase in order to secure a desired charging capacity, and the thickness of the capacitor dielectric film further increases. It is getting thinner. Here, the height of the capacitor is increased and the thickness of the dielectric film becomes thinner because the charge capacity is proportional to the electrode area and the dielectric constant of the dielectric film and inversely proportional to the inter-electrode spacing, that is, the thickness of the dielectric film.

1A is a diagram illustrating a layout of a storage node according to the prior art, and FIG. 1B is a cross-sectional view taken along line II ′ of FIG. 1A.

Referring to FIG. 1A, a storage node SN uses a zigzag array for a highly integrated device of 60 nm or less. At this time, the width of the storage node (SN Hole) in which the story node (SN) is to be formed is 90 nm, and the interval between adjacent storage nodes (SN) arranged in a zigzag is 80 nm. Here, the space between the storage nodes is the width of the storage node isolation layer 11, as shown in FIG. 1B.

However, in the related art, since the critical dimension (CD) of the story node isolation layer 11 is small (80 nm), separation between storage nodes is difficult, and thus, the size of the storage node hole in which the storage node is to be formed is reduced (90 nm). It is difficult to secure bottom area.

As described above, in the prior art, when the gap between the storage node separation layers is not secured, the upper electrode deposition is poor, and when the proper bottom area is not secured, the area of the storage node is reduced and it is difficult to secure the capacitance.

The present invention has been proposed to solve the above problems of the prior art, and provides a method of forming a capacitor capable of increasing the bottom threshold (Bottom CD) of the storage node while reducing the gap between the storage node separation membranes as much as possible. have.

A method of forming a capacitor of the present invention for achieving the above object comprises the steps of forming an insulating film on the etch stop film; Forming a primary hole by partially etching the insulating layer using a first amorphous carbon pattern as an etch barrier; Forming a second amorphous carbon pattern on sidewalls of the primary hole; Forming a secondary hole by wet etching an insulating film on the bottom surface of the primary hole with the second amorphous carbon pattern as an etch barrier in a lateral direction; Etching the remaining portion of the insulating layer on the bottom of the secondary hole to form a third hole exposing the surface of the etching stop layer; Removing the first and second amorphous carbon patterns; Further wet etching the third hole to form a storage node hole having a lower bottom threshold; And forming a storage node in the storage node hole.

Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

2A through 2J are cross-sectional views illustrating a method of forming a capacitor according to an embodiment of the present invention.

As shown in FIG. 2A, a stop nitride 24 is formed on the substrate 21 on which the storage node contacts SNC 23 are formed. The interlayer insulating layer 22 is formed on the substrate 21, and the storage node contact 23 is buried in the contact hole in the interlayer insulating layer 22. The stop nitride film 24 serves as an etch stop during the subsequent etching process.

Subsequently, the PSG 25 and the PETEOS 26 serving as a separator are sequentially stacked on the stop nitride film 24, and then amorphous carbon 27 is formed on the PETEOS 26. Here, the amorphous carbon 27 is deposited at a thickness of 3000 to 8000 Pa. In addition, the PSG 25 is known to have a faster wet etching rate than the PETEOS 26.

Next, SiON 28 is formed on amorphous carbon 27, and photoresist mask PR is formed on SiON 28. Next, as shown in FIG. Here, the SiON 28 serves as an anti-reflective layer, and the amorphous carbon 27 is used as a hard mask.

As shown in FIG. 2B, the SiON 28 and the amorphous carbon 27 are etched using the photoresist mask PR as an etching barrier. At this time, the etching of the SiON 28 is etched using a plasma using a mixed gas of CF ₄ / O ₂ as the main etching gas, but the transient etching is performed between 20 and 100%. Then, the amorphous carbon 27 is etched using a plasma having O ₂ / N ₂ as the main etching gas. Here, when the amorphous carbon 27 is etched, all of the photoresist mask PR is removed.

Thus, the SiON pattern 28A and the amorphous carbon pattern 27A are formed.

As shown in FIG. 2C, the oxide dry etching is performed using the amorphous carbon pattern 27A as a hard mask. This is abbreviated as 'first oxide etch', and the first oxide etch etches all of the PETEOS 26 and partially etches the PSG 25 to form a primary hole 100. .

Here, as the etching target increases, the threshold value (gap between the primary holes) between the separators increases, so that the primary oxide layer is etched with a target having a spacing of about 50 nm between the separators (also, the depth target is 10000 μs).

Preferably, the primary etching gas in the etching of the primary oxide layer uses plasma having C ₄ F ₆ / C ₄ F ₈ / Ar as the stock angle gas, and CF ₄ , C ₃ F ₈ , CH ₂ to improve the etching characteristics. It is also possible to add any one gas selected from the group consisting of F ₂ and O ₂ . Then, the process proceeds to the target whose primary inter-hole spacing is about 40-50 nm.

Part of the corner portion of the amorphous carbon pattern 27A is lost when the primary oxide layer is etched as described above, thereby forming an amorphous carbon pattern 27B having a round shape, and the PETEOS 26 is formed of a PETEOS pattern 26A. do.

As shown in FIG. 2D, an amorphous carbon spacer 29 is formed on the front surface including the remaining amorphous carbon pattern 27B. Here, if the thickness of the amorphous carbon spacer 29 is thicker than 300 GPa, since the bottom opening is a problem during subsequent secondary oxide film etching, the thickness is maintained at least 300 GPa (50 to 300 GPa).

As illustrated in FIG. 2E, spacer etching using a blanket etch is performed to form an amorphous carbon spacer pattern 29A on the sidewall of the primary hole 100.

In this case, the spacer etching is performed by using O ₂ / N ₂ as the main etching gas, leaving the amorphous carbon spacer pattern 29A on the sidewall of the primary hole 100, and removing the amorphous carbon spacer present at the bottom to separate the separator during the secondary oxide etching. Prevents the spacing of livers from decreasing (less than 50 nm).

As described above, a portion of the amorphous carbon pattern 27B may also be etched during the spacer etching, such that the amorphous carbon pattern 27C having a low height may remain.

As shown in FIG. 2F, the first wet etching process using the remaining amorphous carbon pattern 27C and the amorphous carbon spacer pattern 29A as an etching barrier was performed to laterally expand the bottom area of the primary hole 100. The car hole 200 is formed. Here, the first wet etching proceeds to secure a wide bottom threshold value in the subsequent secondary oxide etching, and the PSG 25 at the bottom of the primary hole is wet-etched laterally using a BOE solution. Meanwhile, the stop nitride film 24 under the PSG 25 is not exposed during the first wet etching. That is, the PSG 25 having a predetermined thickness is left on the stop nitride film 24.

As shown in FIG. 2G, the oxide film on the bottom surface of the secondary hole is dry-etched (this is called 'secondary oxide film etching'). In this case, the secondary oxide layer is etched to a part of the stop nitride layer 24 to secure the bottom area as much as possible. Thus, the tertiary hole 300 is formed.

In the etching of the secondary oxide, the stock angle gas uses C ₄ F ₆ / C ₄ F ₈ / O ₂ , but C ₄ F ₈ may be excluded to secure the selectivity of the stop nitride film 24, and the bottom area is CF ₄ / O ₂ can also be added to ensure.

PSG pattern 25A is formed when the tertiary hole 300 is formed as described above.

As shown in Fig. 2H, the amorphous carbon pattern 27C and the amorphous carbon spacer pattern 29A are stripped. In this case, the strip of amorphous carbon material uses a downstream plasma gas having O ₂ as a stock angle gas, and N ₂ gas is added to increase the etching rate by increasing the plasma density. When stripping in the chamber, all of the amorphous carbon is removed because of excellent chemical etch characteristics.

As such, after stripping the amorphous carbon material, the storage node hole 301 is formed. Here, the storage node hole 301 is provided by a separator 400 formed of a stacked structure of the PSG pattern 25A and the PETEOS pattern 26A.

As shown in FIG. 2I, the second wet etching is performed. Buffered Oxide Etchant (BOE) solution is used. Unlike the first wet etching process, amorphous carbon inside the storage node hole 301 is removed, so that the PSG pattern 25A at the bottom and the PETEOS pattern 26A at the top are also etched. In this case, the wet etching target is etched to a target in which the gap between the separators is maintained at 40 nm, thereby increasing the storage capacity of the entire storage node.

After the second wet etching as described above, the final storage node hole 302 having a wider sidewall and bottom area is formed than the storage node hole 301 after the amorphous carbon strip, and the storage node hole 302 has a PSG pattern 25B. And PETEOS pattern 26B is provided by a separator 400 made of a laminated structure. In addition, since the PSG pattern 25B has a faster wet etching rate than the PETEOS pattern 26B, the PSG pattern 25B is laterally expanded on the PSG pattern 25B side.

As illustrated in FIG. 2J, after the stop nitride film 24 is etched to expose the surface of the storage node contact plug 23, the storage node 30 is formed in the storage node hole 301.

In the above-described embodiment, the plasma is formed by using a high frequency of at least 60MHz for the purpose of increasing the plasma density during the primary and secondary oxide film etching.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

Since the present invention described above can secure both the spacing and the bottom area between the separators, there is an effect of improving the characteristics of the highly integrated capacitor.

Claims (17)

Forming an insulating film on the etch stop layer; Forming a first amorphous carbon pattern on the insulating film; Forming a primary hole by partially etching the insulating layer using the first amorphous carbon pattern as an etch barrier; Forming a second amorphous carbon pattern on sidewalls of the primary hole; Forming a secondary hole by wet etching an insulating film on the bottom surface of the primary hole with the second amorphous carbon pattern as an etch barrier in a lateral direction; Etching the remaining portion of the insulating layer on the bottom of the secondary hole to form a third hole exposing the surface of the etching stop layer; Removing the first and second amorphous carbon patterns; Further wet etching the third hole to form a storage node hole having a lower bottom threshold; And Forming a storage node in the storage node hole Forming method of a capacitor comprising a. Claim 2 has been abandoned due to the setting registration fee. The method of claim 1, And the insulating film is formed by stacking a first oxide film and a second oxide film having a wet etching rate lower than that of the first oxide film. Claim 3 was abandoned when the setup registration fee was paid. 3. The method of claim 2, And the first oxide film is formed of PSG and the second oxide film is formed of PETEOS. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, Forming the primary and tertiary holes, Method of forming a capacitor to proceed by dry etching. Claim 5 was abandoned upon payment of a set-up fee. 5. The method of claim 4, The etching for forming the primary hole, Proceed by using a plasma having C ₄ F ₆ / C ₄ F ₈ / Ar as the stock angle gas, and adding any one gas selected from the group consisting of CF ₄ , C ₃ F ₈ , CH ₂ F _2, and O ₂ . Formation method of the capacitor. Claim 6 was abandoned when the registration fee was paid. The method of claim 5, A method for producing a capacitor that advances to a target such that the interval between adjacent primary holes is about 40 to 50 nm. Claim 7 was abandoned upon payment of a set-up fee. 5. The method of claim 4, Etching for forming the secondary hole, A method of forming a capacitor, which proceeds by further adding CF ₄ / O ₂ using plasma having C ₄ F ₆ / C ₄ F ₈ / O ₂ or C ₄ F ₆ / O ₂ as a stock corner gas. Claim 8 was abandoned when the registration fee was paid. The method according to claim 5 or 7, At the time of plasma formation, forming a plasma using a high frequency of at least 60 MHz. Claim 9 was abandoned upon payment of a set-up fee. The method of claim 1, And the first amorphous carbon pattern is formed to have a thickness of 3000 to 8000 GPa. Claim 10 was abandoned upon payment of a setup registration fee. The method of claim 1, The second amorphous carbon pattern is, A method of forming a capacitor which is formed by performing spacer etching using amorphous carbon formation and full surface etching. Claim 11 was abandoned upon payment of a setup registration fee. The method of claim 10, Wherein the amorphous carbon for the second amorphous carbon pattern is formed to a thickness of at least 300 GPa. Claim 12 is abandoned in setting registration fee. The method of claim 10, The front side etching is a method of forming a capacitor using O ₂ / N ₂ as the main etching gas. Claim 13 was abandoned upon payment of a registration fee. The method according to any one of claims 1, 2 or 3, The wet etching for forming the secondary hole and the additional wet etching for the third hole, Method for forming a capacitor using a BOE solution. Claim 14 has been abandoned due to the setting registration fee. The method of claim 1, Removing the first and second amorphous carbon patterns, A method of forming a capacitor using a gas plasma of a downstream method using O ₂ as a stock corner gas, and further adding N ₂ gas. Claim 15 was abandoned upon payment of a registration fee. The method of claim 1, Forming the first amorphous carbon pattern, Forming an amorphous carbon on the insulating film; Forming SiON on the amorphous carbon; Forming a photoresist mask on the SiON; And Forming the first amorphous carbon pattern by sequentially etching the SiON and the amorphous carbon using the photoresist mask as an etching barrier Forming method of a capacitor comprising a. Claim 16 has been abandoned due to the setting registration fee. The method of claim 15, Wherein the etching of the SiON, using a plasma with a mixed gas of CF ₄ / O ₂ as the main etching gas, but the etching method of forming a capacitor to proceed between 20 to 100% transient etching. Claim 17 has been abandoned due to the setting registration fee. The method of claim 15, The etching of the amorphous carbon is a method of forming a capacitor by using a plasma using O ₂ / N ₂ as the main etching gas.

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