KR101128260B1 - 처리된 포토레지스트를 사용하는 반도체 디바이스의 제조방법 - Google Patents

처리된 포토레지스트를 사용하는 반도체 디바이스의 제조방법 Download PDF

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Publication number
KR101128260B1
KR101128260B1 KR1020067016205A KR20067016205A KR101128260B1 KR 101128260 B1 KR101128260 B1 KR 101128260B1 KR 1020067016205 A KR1020067016205 A KR 1020067016205A KR 20067016205 A KR20067016205 A KR 20067016205A KR 101128260 B1 KR101128260 B1 KR 101128260B1
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South Korea
Prior art keywords
patterned
photoresist layer
processing
layer
photoresist
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KR1020067016205A
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English (en)
Korean (ko)
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KR20060114716A (ko
Inventor
세자르 엠. 가르사
윌리암 디. 다링톤
스탠리 엠. 필리피아크
제임스 이. 바세크
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프리스케일 세미컨덕터, 인크.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/945—Special, e.g. metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020067016205A 2004-02-13 2005-01-12 처리된 포토레지스트를 사용하는 반도체 디바이스의 제조방법 Expired - Fee Related KR101128260B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/779,007 US7157377B2 (en) 2004-02-13 2004-02-13 Method of making a semiconductor device using treated photoresist
US10/779,007 2004-02-13
PCT/US2005/000961 WO2005082122A2 (en) 2004-02-13 2005-01-12 Method of making a semiconductor device using treated photoresist

Publications (2)

Publication Number Publication Date
KR20060114716A KR20060114716A (ko) 2006-11-07
KR101128260B1 true KR101128260B1 (ko) 2012-03-26

Family

ID=34838285

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020067016205A Expired - Fee Related KR101128260B1 (ko) 2004-02-13 2005-01-12 처리된 포토레지스트를 사용하는 반도체 디바이스의 제조방법

Country Status (6)

Country Link
US (2) US7157377B2 (enExample)
EP (1) EP1719162B8 (enExample)
JP (1) JP2007522673A (enExample)
KR (1) KR101128260B1 (enExample)
CN (1) CN100487873C (enExample)
WO (1) WO2005082122A2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050026084A1 (en) * 2003-07-31 2005-02-03 Garza Cesar M. Semiconductor device and method for elimination of resist linewidth slimming by fluorination
US8057143B2 (en) * 2004-10-05 2011-11-15 Fontaine Trailer Company, Inc. Trailer load securement system
US7435354B2 (en) * 2005-01-06 2008-10-14 United Microelectronic Corp. Treatment method for surface of photoresist layer and method for forming patterned photoresist layer
US8915684B2 (en) 2005-09-27 2014-12-23 Fontaine Trailer Company, Inc. Cargo deck
JP2007311508A (ja) * 2006-05-17 2007-11-29 Nikon Corp 微細パターン形成方法及びデバイス製造方法
US7703826B1 (en) * 2006-09-08 2010-04-27 German Mark K Bed liner rail system for cargo holddown
JP4638550B2 (ja) * 2008-09-29 2011-02-23 東京エレクトロン株式会社 マスクパターンの形成方法、微細パターンの形成方法及び成膜装置
CN102573329B (zh) * 2010-12-08 2014-04-02 北大方正集团有限公司 制作电路板导电柱的方法、系统以及电路板
WO2012173698A1 (en) * 2011-06-15 2012-12-20 Applied Materials, Inc. Methods and apparatus for controlling photoresist line width roughness with enhanced electron spin control
US8647817B2 (en) * 2012-01-03 2014-02-11 Tokyo Electron Limited Vapor treatment process for pattern smoothing and inline critical dimension slimming
JP2015115599A (ja) * 2013-12-13 2015-06-22 株式会社東芝 パターン形成方法
EP3719576A1 (en) * 2019-04-04 2020-10-07 IMEC vzw Resistless pattering mask
DE102020206696A1 (de) 2020-05-28 2021-12-02 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren und Steuergerät zum Herstellen eines Trägerelements zum Aufnehmen einer Probenflüssigkeit, Trägerelement, Trägermodul und Verfahren zum Verwenden eines Trägerelements

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002305181A (ja) * 2001-04-06 2002-10-18 Seiko Epson Corp 半導体装置の製造方法
US6716571B2 (en) * 2001-03-28 2004-04-06 Advanced Micro Devices, Inc. Selective photoresist hardening to facilitate lateral trimming
US6815359B2 (en) * 2001-03-28 2004-11-09 Advanced Micro Devices, Inc. Process for improving the etch stability of ultra-thin photoresist

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4187331A (en) * 1978-08-24 1980-02-05 International Business Machines Corp. Fluorine plasma resist image hardening
US5332653A (en) * 1992-07-01 1994-07-26 Motorola, Inc. Process for forming a conductive region without photoresist-related reflective notching damage
JPH0669190A (ja) * 1992-08-21 1994-03-11 Fujitsu Ltd フッ素系樹脂膜の形成方法
US5912187A (en) * 1993-12-30 1999-06-15 Lucent Technologies Inc. Method of fabricating circuits
JPH0831720A (ja) * 1994-07-13 1996-02-02 Nkk Corp レジストマスクの形成方法
EP0911697A3 (en) * 1997-10-22 1999-09-15 Interuniversitair Microelektronica Centrum Vzw A fluorinated hard mask for micropatterning of polymers
JPH11251295A (ja) * 1998-02-27 1999-09-17 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP2000214575A (ja) * 1999-01-26 2000-08-04 Sharp Corp クロムマスクの形成方法
US6506653B1 (en) * 2000-03-13 2003-01-14 International Business Machines Corporation Method using disposable and permanent films for diffusion and implant doping
US6630288B2 (en) * 2001-03-28 2003-10-07 Advanced Micro Devices, Inc. Process for forming sub-lithographic photoresist features by modification of the photoresist surface
US6589709B1 (en) * 2001-03-28 2003-07-08 Advanced Micro Devices, Inc. Process for preventing deformation of patterned photoresist features
JP4780264B2 (ja) * 2001-05-16 2011-09-28 信越化学工業株式会社 クロム系フォトマスクの形成方法
JP3725811B2 (ja) * 2001-10-11 2005-12-14 ローム株式会社 半導体装置の製造方法
US6790782B1 (en) * 2001-12-28 2004-09-14 Advanced Micro Devices, Inc. Process for fabrication of a transistor gate including high-K gate dielectric with in-situ resist trim, gate etch, and high-K dielectric removal
US6716570B2 (en) * 2002-05-23 2004-04-06 Institute Of Microelectronics Low temperature resist trimming process
US6979408B2 (en) * 2002-12-30 2005-12-27 Intel Corporation Method and apparatus for photomask fabrication
US20050026084A1 (en) * 2003-07-31 2005-02-03 Garza Cesar M. Semiconductor device and method for elimination of resist linewidth slimming by fluorination
US6849515B1 (en) * 2003-09-25 2005-02-01 Freescale Semiconductor, Inc. Semiconductor process for disposable sidewall spacers

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6716571B2 (en) * 2001-03-28 2004-04-06 Advanced Micro Devices, Inc. Selective photoresist hardening to facilitate lateral trimming
US6815359B2 (en) * 2001-03-28 2004-11-09 Advanced Micro Devices, Inc. Process for improving the etch stability of ultra-thin photoresist
JP2002305181A (ja) * 2001-04-06 2002-10-18 Seiko Epson Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
EP1719162B8 (en) 2016-05-11
US20050181630A1 (en) 2005-08-18
KR20060114716A (ko) 2006-11-07
CN100487873C (zh) 2009-05-13
US7157377B2 (en) 2007-01-02
US20050224455A1 (en) 2005-10-13
JP2007522673A (ja) 2007-08-09
EP1719162A2 (en) 2006-11-08
CN1918700A (zh) 2007-02-21
WO2005082122A2 (en) 2005-09-09
WO2005082122A3 (en) 2006-02-16
EP1719162B1 (en) 2016-03-23
EP1719162A4 (en) 2009-05-20

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