KR101046862B1 - 낮은 k 이중 다마신 집적회로들의 형성에 사용할 수 있는 유기 barc 식각 프로세스 - Google Patents

낮은 k 이중 다마신 집적회로들의 형성에 사용할 수 있는 유기 barc 식각 프로세스 Download PDF

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KR101046862B1
KR101046862B1 KR1020087025159A KR20087025159A KR101046862B1 KR 101046862 B1 KR101046862 B1 KR 101046862B1 KR 1020087025159 A KR1020087025159 A KR 1020087025159A KR 20087025159 A KR20087025159 A KR 20087025159A KR 101046862 B1 KR101046862 B1 KR 101046862B1
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South Korea
Prior art keywords
etching
planarization layer
organic planarization
plasma reactor
organic
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Expired - Fee Related
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KR1020087025159A
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Korean (ko)
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KR20080109849A (ko
Inventor
옌스 카르슈텐 슈나이더
잉 시아오
가라르도 델가디노
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어플라이드 머티어리얼스, 인코포레이티드
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
KR1020087025159A 2006-03-20 2007-03-20 낮은 k 이중 다마신 집적회로들의 형성에 사용할 수 있는 유기 barc 식각 프로세스 Expired - Fee Related KR101046862B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/385,256 US7828987B2 (en) 2006-03-20 2006-03-20 Organic BARC etch process capable of use in the formation of low K dual damascene integrated circuits
US11/385,256 2006-03-20
PCT/US2007/007010 WO2007123616A2 (en) 2006-03-20 2007-03-20 Organic barc etch process capable of use in the formation of low k dual damascene integrated circuits

Publications (2)

Publication Number Publication Date
KR20080109849A KR20080109849A (ko) 2008-12-17
KR101046862B1 true KR101046862B1 (ko) 2011-07-06

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KR1020087025159A Expired - Fee Related KR101046862B1 (ko) 2006-03-20 2007-03-20 낮은 k 이중 다마신 집적회로들의 형성에 사용할 수 있는 유기 barc 식각 프로세스

Country Status (6)

Country Link
US (1) US7828987B2 (https=)
EP (1) EP2002467A2 (https=)
JP (1) JP2009530863A (https=)
KR (1) KR101046862B1 (https=)
CN (1) CN101449363B (https=)
WO (1) WO2007123616A2 (https=)

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US8316527B2 (en) 2008-04-01 2012-11-27 Western Digital (Fremont), Llc Method for providing at least one magnetoresistive device
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US8349195B1 (en) 2008-06-27 2013-01-08 Western Digital (Fremont), Llc Method and system for providing a magnetoresistive structure using undercut free mask
US8138093B2 (en) * 2009-08-12 2012-03-20 International Business Machines Corporation Method for forming trenches having different widths and the same depth
US8513129B2 (en) * 2010-05-28 2013-08-20 Applied Materials, Inc. Planarizing etch hardmask to increase pattern density and aspect ratio
CN103107158A (zh) * 2011-11-11 2013-05-15 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
CN103165576B (zh) * 2011-12-13 2015-10-14 中芯国际集成电路制造(上海)有限公司 半导体器件及其制造方法
US8551877B2 (en) * 2012-03-07 2013-10-08 Tokyo Electron Limited Sidewall and chamfer protection during hard mask removal for interconnect patterning
CN102891103B (zh) * 2012-09-17 2015-01-21 上海华力微电子有限公司 一种制备顶层金属互联工艺刻蚀中间停止层的方法
JP2014165191A (ja) * 2013-02-21 2014-09-08 Seiko Instruments Inc 紫外線消去型の不揮発性半導体装置
US9400529B2 (en) 2013-09-27 2016-07-26 Apple Inc. Electronic device having housing with embedded interconnects
US20150118832A1 (en) * 2013-10-24 2015-04-30 Applied Materials, Inc. Methods for patterning a hardmask layer for an ion implantation process
US9385086B2 (en) * 2013-12-10 2016-07-05 Taiwan Semiconductor Manufacturing Co., Ltd. Bi-layer hard mask for robust metallization profile
US9093387B1 (en) * 2014-01-08 2015-07-28 International Business Machines Corporation Metallic mask patterning process for minimizing collateral etch of an underlayer
US9385000B2 (en) * 2014-01-24 2016-07-05 United Microelectronics Corp. Method of performing etching process
US9454177B2 (en) 2014-02-14 2016-09-27 Apple Inc. Electronic devices with housing-based interconnects and coupling structures
CN105097493B (zh) * 2014-04-24 2020-09-08 中芯国际集成电路制造(上海)有限公司 一种制作半导体器件的方法
CN104900510B (zh) * 2015-06-29 2018-01-26 上海华力微电子有限公司 刻蚀映射关系模型和控制浅槽隔离刻蚀关键尺寸的方法
US9859156B2 (en) * 2015-12-30 2018-01-02 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnection structure with sidewall dielectric protection layer
US10157773B1 (en) 2017-11-28 2018-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure having layer with re-entrant profile and method of forming the same
WO2020258124A1 (en) * 2019-06-27 2020-12-30 Yangtze Memory Technologies Co., Ltd. Interconnect structure and method of forming the same
CN113053805B (zh) * 2021-03-11 2022-06-10 长鑫存储技术有限公司 半导体结构的形成方法及半导体结构
CN115547823B (zh) * 2021-06-30 2025-12-12 中微半导体设备(上海)股份有限公司 一种半导体结构的形成方法及半导体结构
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Also Published As

Publication number Publication date
WO2007123616A2 (en) 2007-11-01
US7828987B2 (en) 2010-11-09
KR20080109849A (ko) 2008-12-17
JP2009530863A (ja) 2009-08-27
WO2007123616A3 (en) 2008-08-28
CN101449363B (zh) 2010-12-01
CN101449363A (zh) 2009-06-03
EP2002467A2 (en) 2008-12-17
US20070218679A1 (en) 2007-09-20

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