KR101024796B1 - Ｐｌｌ 장치 - Google Patents

Ｐｌｌ 장치 Download PDF

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Publication number
KR101024796B1
KR101024796B1 KR1020087023791A KR20087023791A KR101024796B1 KR 101024796 B1 KR101024796 B1 KR 101024796B1 KR 1020087023791 A KR1020087023791 A KR 1020087023791A KR 20087023791 A KR20087023791 A KR 20087023791A KR 101024796 B1 KR101024796 B1 KR 101024796B1
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KR
South Korea
Prior art keywords
phase difference
signal
data
frequency signal
vector
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KR1020087023791A
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English (en)
Korean (ko)
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KR20080099867A (ko
Inventor
나오끼 오니시
šœ이찌 와까마쯔
쯔요시 시오바라
Original Assignee
니혼 덴파 고교 가부시끼가이샤
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Application filed by 니혼 덴파 고교 가부시끼가이샤 filed Critical 니혼 덴파 고교 가부시끼가이샤
Publication of KR20080099867A publication Critical patent/KR20080099867A/ko
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Publication of KR101024796B1 publication Critical patent/KR101024796B1/ko
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail
    • H03L7/146—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail by using digital means for generating the oscillator control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/12—Indirect frequency synthesis using a mixer in the phase-locked loop

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
KR1020087023791A 2006-03-31 2007-03-30 Ｐｌｌ 장치 Expired - Fee Related KR101024796B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2006-00100614 2006-03-31
JP2006100614A JP4356946B2 (ja) 2006-03-31 2006-03-31 Ｐｌｌ装置

Publications (2)

Publication Number Publication Date
KR20080099867A KR20080099867A (ko) 2008-11-13
KR101024796B1 true KR101024796B1 (ko) 2011-03-24

Family

ID=38563759

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020087023791A Expired - Fee Related KR101024796B1 (ko) 2006-03-31 2007-03-30 Ｐｌｌ 장치

Country Status (6)

Country Link
US (1) US7755436B2 (enExample)
EP (1) EP2003780B1 (enExample)
JP (1) JP4356946B2 (enExample)
KR (1) KR101024796B1 (enExample)
CN (1) CN101411068B (enExample)
WO (1) WO2007114501A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4356947B2 (ja) * 2006-03-31 2009-11-04 日本電波工業株式会社 Ｐｌｌ装置
US8386829B2 (en) * 2009-06-17 2013-02-26 Macronix International Co., Ltd. Automatic internal trimming calibration method to compensate process variation
JP5458719B2 (ja) 2009-07-24 2014-04-02 日本電気株式会社 クロック同期システムと通信装置と方法とプログラム
TWI404341B (zh) * 2009-12-31 2013-08-01 Realtek Semiconductor Corp 記憶控制電壓並鎖定頻率訊號之電路、鎖相迴路裝置與其控制方法
US8330509B2 (en) * 2010-04-12 2012-12-11 Intel Mobile Communications GmbH Suppression of low-frequency noise from phase detector in phase control loop
KR20150081848A (ko) 2014-01-07 2015-07-15 삼성디스플레이 주식회사 표시 패널의 구동 전압 발생 방법 및 이를 수행하는 표시 장치
US9602113B2 (en) * 2014-08-27 2017-03-21 Qualcomm Incorporated Fast frequency throttling and re-locking technique for phase-locked loops
CN109088633B (zh) * 2018-09-20 2021-12-03 郑州云海信息技术有限公司 一种脉冲产生器、脉冲产生方法及电子设备
CN109584773B (zh) * 2018-12-24 2022-04-01 惠科股份有限公司 时序控制方法、时序控制芯片和显示装置
CN110932719B (zh) * 2019-11-29 2021-11-23 深圳市皓文电子有限公司 开关电源的时钟信号切换方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2112236A (en) * 1981-11-03 1983-07-13 Telecommunications Sa Digital device for clock signal synchronization
JPH10173642A (ja) 1996-12-11 1998-06-26 Hitachi Denshi Ltd クロック同期回路
JP2002353807A (ja) 2001-05-29 2002-12-06 Nec Saitama Ltd 周波数同期装置および周波数同期制御方法
JP2004235858A (ja) 2003-01-29 2004-08-19 Sony Corp 位相波形ゲイン制御方法及び位相波形ゲイン制御装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3432313A1 (de) 1984-09-03 1986-03-13 Philips Patentverwaltung Gmbh, 2000 Hamburg Schaltungsanordnung zum synchronisieren eines signals
US6304620B1 (en) * 1998-03-20 2001-10-16 Philips Electronics North America Corproation Sign-cross product automatic frequency control loop
US6282500B1 (en) 1998-09-09 2001-08-28 Qualcomm Inc. Accumulated phase measurement using open-loop phase estimation
DE60208964T2 (de) * 2002-11-21 2006-10-26 Sony Ericsson Mobile Communications Ab Oszillatorfrequenzsteuerung
JP2005109551A (ja) 2003-09-26 2005-04-21 Matsushita Electric Ind Co Ltd Ｐｌｌ回路
JP4356947B2 (ja) * 2006-03-31 2009-11-04 日本電波工業株式会社 Ｐｌｌ装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2112236A (en) * 1981-11-03 1983-07-13 Telecommunications Sa Digital device for clock signal synchronization
JPH10173642A (ja) 1996-12-11 1998-06-26 Hitachi Denshi Ltd クロック同期回路
JP2002353807A (ja) 2001-05-29 2002-12-06 Nec Saitama Ltd 周波数同期装置および周波数同期制御方法
JP2004235858A (ja) 2003-01-29 2004-08-19 Sony Corp 位相波形ゲイン制御方法及び位相波形ゲイン制御装置

Also Published As

Publication number Publication date
WO2007114501A1 (ja) 2007-10-11
US20090146742A1 (en) 2009-06-11
KR20080099867A (ko) 2008-11-13
CN101411068B (zh) 2011-08-24
JP4356946B2 (ja) 2009-11-04
CN101411068A (zh) 2009-04-15
US7755436B2 (en) 2010-07-13
EP2003780A4 (en) 2010-09-22
EP2003780B1 (en) 2012-10-17
EP2003780A1 (en) 2008-12-17
JP2007274612A (ja) 2007-10-18

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