KR101000625B1 - 메모리 카드 및 그 제조방법 - Google Patents

메모리 카드 및 그 제조방법 Download PDF

Info

Publication number
KR101000625B1
KR101000625B1 KR1020030035493A KR20030035493A KR101000625B1 KR 101000625 B1 KR101000625 B1 KR 101000625B1 KR 1020030035493 A KR1020030035493 A KR 1020030035493A KR 20030035493 A KR20030035493 A KR 20030035493A KR 101000625 B1 KR101000625 B1 KR 101000625B1
Authority
KR
South Korea
Prior art keywords
lead frame
flash memory
memory card
chip
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020030035493A
Other languages
English (en)
Korean (ko)
Other versions
KR20040014185A (ko
Inventor
가네모토코이치
마수다마사치가
Original Assignee
가부시키가이샤 히타치세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가부시키가이샤 히타치세이사쿠쇼
Publication of KR20040014185A publication Critical patent/KR20040014185A/ko
Application granted granted Critical
Publication of KR101000625B1 publication Critical patent/KR101000625B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07732—Physical layout of the record carrier the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Credit Cards Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020030035493A 2002-06-10 2003-06-03 메모리 카드 및 그 제조방법 Expired - Fee Related KR101000625B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002169144A JP4171246B2 (ja) 2002-06-10 2002-06-10 メモリカードおよびその製造方法
JPJP-P-2002-00169144 2002-06-10

Publications (2)

Publication Number Publication Date
KR20040014185A KR20040014185A (ko) 2004-02-14
KR101000625B1 true KR101000625B1 (ko) 2010-12-10

Family

ID=29706817

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020030035493A Expired - Fee Related KR101000625B1 (ko) 2002-06-10 2003-06-03 메모리 카드 및 그 제조방법

Country Status (3)

Country Link
US (1) US6924547B2 (enExample)
JP (1) JP4171246B2 (enExample)
KR (1) KR101000625B1 (enExample)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7264992B2 (en) * 2004-08-06 2007-09-04 Paul Hsueh Removable flash integrated memory module card and method of manufacture
US8141240B2 (en) 1999-08-04 2012-03-27 Super Talent Electronics, Inc. Manufacturing method for micro-SD flash memory card
US7830666B2 (en) * 2000-01-06 2010-11-09 Super Talent Electronics, Inc. Manufacturing process for single-chip MMC/SD flash memory device with molded asymmetric circuit board
US20080286990A1 (en) * 2003-12-02 2008-11-20 Super Talent Electronics, Inc. Direct Package Mold Process For Single Chip SD Flash Cards
US6900527B1 (en) * 2001-09-19 2005-05-31 Amkor Technology, Inc. Lead-frame method and assembly for interconnecting circuits within a circuit module
US8998620B2 (en) * 2003-12-02 2015-04-07 Super Talent Technology, Corp. Molding method for COB-EUSB devices and metal housing package
US8102657B2 (en) 2003-12-02 2012-01-24 Super Talent Electronics, Inc. Single shot molding method for COB USB/EUSB devices with contact pad ribs
US20080195817A1 (en) * 2004-07-08 2008-08-14 Super Talent Electronics, Inc. SD Flash Memory Card Manufacturing Using Rigid-Flex PCB
KR100858756B1 (ko) 2004-07-12 2008-09-16 가부시끼가이샤 도시바 저장 디바이스 및 호스트 장치
US20060027906A1 (en) * 2004-08-03 2006-02-09 Sheng-Chih Hsu Exclusive memory structure applicable for multi media card and secure digital card
KR100574996B1 (ko) * 2004-11-25 2006-05-02 삼성전자주식회사 반도체 패키지 및 이를 이용한 메모리 카드, 및 이의제조에 이용되는 몰드
KR100585163B1 (ko) 2004-11-27 2006-06-01 삼성전자주식회사 메모리 카드 및 그 제조방법
JP2007081232A (ja) * 2005-09-15 2007-03-29 Renesas Technology Corp 半導体装置の製造方法
DE502005007956D1 (de) * 2005-11-14 2009-10-01 Tyco Electronics Amp Gmbh Smartcard-Körper, Smartcard und Herstellungsverfahren
JP4843311B2 (ja) * 2005-12-27 2011-12-21 富士通コンポーネント株式会社 メモリカード及びその製造方法
WO2007088866A1 (ja) 2006-02-02 2007-08-09 Matsushita Electric Industrial Co., Ltd. メモリカードおよびメモリカードの製造方法
JP2007205908A (ja) 2006-02-02 2007-08-16 Matsushita Electric Ind Co Ltd 重量センサ
WO2007123143A1 (ja) 2006-04-21 2007-11-01 Panasonic Corporation メモリカード
KR100849182B1 (ko) 2007-01-22 2008-07-30 삼성전자주식회사 반도체 카드 패키지 및 그 제조방법
US8254134B2 (en) * 2007-05-03 2012-08-28 Super Talent Electronics, Inc. Molded memory card with write protection switch assembly
WO2008152774A1 (ja) * 2007-06-15 2008-12-18 Panasonic Corporation メモリカードおよびその製造方法
US8102658B2 (en) * 2007-07-05 2012-01-24 Super Talent Electronics, Inc. Micro-SD to secure digital adaptor card and manufacturing method
JP2009032013A (ja) * 2007-07-26 2009-02-12 Toshiba Corp 半導体装置及びその製造方法
USD794644S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD794643S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD794642S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD794641S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD795261S1 (en) * 2009-01-07 2017-08-22 Samsung Electronics Co., Ltd. Memory device
USD795262S1 (en) * 2009-01-07 2017-08-22 Samsung Electronics Co., Ltd. Memory device
USD794034S1 (en) * 2009-01-07 2017-08-08 Samsung Electronics Co., Ltd. Memory device
KR101035209B1 (ko) * 2010-01-26 2011-05-17 주식회사 영일프레시젼 방열판을 포함하는 아이씨 카드의 충진제 플래쉬 방지방법
JP5242644B2 (ja) 2010-08-31 2013-07-24 株式会社東芝 半導体記憶装置
JP2012212417A (ja) 2011-03-24 2012-11-01 Toshiba Corp 半導体メモリカード
US20130286603A1 (en) * 2012-04-30 2013-10-31 Takashi Okada Memory card and sd card
JP5740372B2 (ja) * 2012-09-12 2015-06-24 株式会社東芝 半導体メモリカード
US9195929B2 (en) * 2013-08-05 2015-11-24 A-Men Technology Corporation Chip card assembling structure and method thereof
US20200325821A1 (en) 2019-04-09 2020-10-15 Rolls-Royce North American Technologies Inc. Starter/generator

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001209773A (ja) * 2000-01-25 2001-08-03 Hitachi Ltd Ｉｃカード

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19710514C2 (de) * 1997-03-13 2001-06-28 Itt Mfg Enterprises Inc Steckkarte für elektronische Geräte
JP3768761B2 (ja) 2000-01-31 2006-04-19 株式会社日立製作所 半導体装置およびその製造方法
US6444501B1 (en) * 2001-06-12 2002-09-03 Micron Technology, Inc. Two stage transfer molding method to encapsulate MMC module
US6843421B2 (en) * 2001-08-13 2005-01-18 Matrix Semiconductor, Inc. Molded memory module and method of making the module absent a substrate support

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001209773A (ja) * 2000-01-25 2001-08-03 Hitachi Ltd Ｉｃカード

Also Published As

Publication number Publication date
JP4171246B2 (ja) 2008-10-22
KR20040014185A (ko) 2004-02-14
JP2004013738A (ja) 2004-01-15
US20030227075A1 (en) 2003-12-11
US6924547B2 (en) 2005-08-02

Similar Documents

Publication Publication Date Title
KR101000625B1 (ko) 메모리 카드 및 그 제조방법
US6861734B2 (en) Resin-molded semiconductor device
KR101131353B1 (ko) 반도체 장치
US6538311B2 (en) Two-stage transfer molding method to encapsulate MMC module
US5760471A (en) Semiconductor device having an inner lead extending over a central portion of a semiconductor device sealed in a plastic package and an outer lead exposed to the outside of a side face of the plastic package
US6625036B1 (en) Infrared data communication module and method of making the same
KR100266071B1 (ko) 칩 온 보드 패키지용 인쇄회로기판 및 그를 이용한 칩 온 보드 패키지
JPH09298256A (ja) 電子部品とその製造方法及びそれに用いるリードフレームと金型
JP2005085089A (ja) Ｉｃカードおよびその製造方法
KR20030076199A (ko) 반도체 장치 및 그 제조 방법
JPH1032287A (ja) 樹脂封止型半導体装置とその製造方法
JP2533012B2 (ja) 表面実装型半導体装置
JP4451298B2 (ja) Ｉｃカードモジュール体
JP2005100293A (ja) Ｉｃカードおよびその製造方法
JP5547952B2 (ja) Ｒｆｉｄタグの製造方法、及び金型
KR100262733B1 (ko) 칩온보드(cob)패키지용인쇄회로기판및그를이용한칩온보드패키지
KR100326392B1 (ko) 칩 카드용 베이스 기판 및 그를 이용한 칩 카드
KR100281305B1 (ko) 개선된박형패키지ic소자
KR19990000701A (ko) 칩 온 보드(cob) 패키지용 인쇄회로기판 및 그를 이용한 칩 온 보드 패키지
KR100253708B1 (ko) 반도체 패키지 및 그 제조방법
KR0145767B1 (ko) 초박형 반도체 패키지 및 그 제조방법
JP4207671B2 (ja) 半導体パッケージの製造方法
WO2004112133A1 (ja) メタル基材装置及びｉｃカードモジュールの製造方法
JP2006085341A (ja) Ｉｃモジュール
JPH08203941A (ja) 半導体装置及びその製造装置

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

FPAY Annual fee payment

Payment date: 20131118

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20141120

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

FPAY Annual fee payment

Payment date: 20151118

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20161207

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20161207

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000