KR100968646B1 - 반도체 수동 소자의 제조 방법 - Google Patents
반도체 수동 소자의 제조 방법 Download PDFInfo
- Publication number
- KR100968646B1 KR100968646B1 KR1020070139685A KR20070139685A KR100968646B1 KR 100968646 B1 KR100968646 B1 KR 100968646B1 KR 1020070139685 A KR1020070139685 A KR 1020070139685A KR 20070139685 A KR20070139685 A KR 20070139685A KR 100968646 B1 KR100968646 B1 KR 100968646B1
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- South Korea
- Prior art keywords
- conductive layer
- lower conductive
- upper conductive
- metal
- insulating film
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 54
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 239000010410 layer Substances 0.000 claims abstract description 113
- 229910052751 metal Inorganic materials 0.000 claims abstract description 38
- 239000002184 metal Substances 0.000 claims abstract description 38
- 239000003990 capacitor Substances 0.000 claims abstract description 26
- 238000005530 etching Methods 0.000 claims abstract description 26
- 239000011229 interlayer Substances 0.000 claims abstract description 24
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052802 copper Inorganic materials 0.000 claims abstract description 14
- 239000010949 copper Substances 0.000 claims abstract description 14
- 238000000059 patterning Methods 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 230000004888 barrier function Effects 0.000 claims abstract description 9
- 238000009792 diffusion process Methods 0.000 claims abstract description 8
- 238000000206 photolithography Methods 0.000 claims abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (6)
- 소정의 하부 구조가 형성된 기판 상에 금속 확산 방지막과 하부 도전층을 순차로 형성하는 단계;상기 하부 도전층에 대한 사진 및 식각 공정으로 하부 도전층을 패터닝하는 단계;상기 하부 도전층이 패터닝된 결과물 상에 절연막과 상부 도전층을 순차로 형성하는 단계;상기 상부 도전층에 대한 사진 및 식각 공정으로 상부 도전층을 패터닝하여 MIM 캐패시터 패턴을 형성하는 단계;상기 MIM 캐패시터 패턴(MIM)이 형성된 기판 상에 층간절연막을 증착하는 단계;상기 층간절연막을 식각하여 콘택홀을 형성하는 단계; 및상기 콘택홀을 금속으로 매립한 후 평탄화하여 금속 배선을 형성하는 단계;를 포함하는 반도체 수동 소자의 제조 방법.
- 제 1항에 있어서,상기 하부 도전층과 상부 도전층은 각각 TiN막 또는 TaN막으로 형성하는 것을 특징으로 하는 반도체 수동 소자의 제조 방법.
- 제 1항에 있어서, 상기 하부 도전층 패터닝 공정과 상부 도전층 패터닝 공정은;하부 도전층 또는 상부 도전층 상부에 포토레지스트 패턴을 형성하는 단계;상기 포토레지스트 패턴을 이용한 식각 공정을 진행하여 하부 도전층 또는 상부 도전층을 형성하는 단계;상기 포토레지스트 패턴을 제거하는 단계를 포함함을 특징으로 하는 반도체 수동 소자의 제조 방법.
- 제 3항에 있어서,상기 하부 도전층과 상부 도전층 식각 공정은 건식 식각 공정으로 실시하는 것을 특징으로 하는 반도체 수동 소자의 제조 방법.
- 제 1항에 있어서,상기 절연막은 SiN, Ta2O5, Al2O3, HfO 중 선택된 어느 하나로 형성하는 것을 특징으로 하는 반도체 수동 소자의 제조 방법.
- 제 1항에 있어서,상기 콘택홀을 매립시키기 위한 금속으로 구리를 사용하는 것을 특징으로 하 는 반도체 수동 소자의 제조 방법.
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KR1020070139685A KR100968646B1 (ko) | 2007-12-28 | 2007-12-28 | 반도체 수동 소자의 제조 방법 |
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KR1020070139685A KR100968646B1 (ko) | 2007-12-28 | 2007-12-28 | 반도체 수동 소자의 제조 방법 |
Publications (2)
Publication Number | Publication Date |
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KR20090071789A KR20090071789A (ko) | 2009-07-02 |
KR100968646B1 true KR100968646B1 (ko) | 2010-07-06 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105336574A (zh) * | 2014-08-07 | 2016-02-17 | 无锡华润上华半导体有限公司 | 氮化硅薄膜及mim电容的制作方法 |
Families Citing this family (1)
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KR101035055B1 (ko) * | 2009-06-24 | 2011-05-19 | 전자부품연구원 | 이종 카메라를 이용한 객체 추적 시스템 및 방법 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20040042093A (ko) * | 2002-11-13 | 2004-05-20 | 삼성전자주식회사 | 금속-절연체-금속 커패시터의 제조 방법 |
KR20050055433A (ko) * | 2003-12-08 | 2005-06-13 | 매그나칩 반도체 유한회사 | 엠아이엠 캐패시터 형성방법 |
KR20050116432A (ko) * | 2004-06-07 | 2005-12-12 | 동부아남반도체 주식회사 | 박막 커패시터의 제조 방법 |
KR20070031621A (ko) * | 2005-09-15 | 2007-03-20 | 매그나칩 반도체 유한회사 | 반도체 소자 제조 방법 |
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- 2007-12-28 KR KR1020070139685A patent/KR100968646B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20040042093A (ko) * | 2002-11-13 | 2004-05-20 | 삼성전자주식회사 | 금속-절연체-금속 커패시터의 제조 방법 |
KR20050055433A (ko) * | 2003-12-08 | 2005-06-13 | 매그나칩 반도체 유한회사 | 엠아이엠 캐패시터 형성방법 |
KR20050116432A (ko) * | 2004-06-07 | 2005-12-12 | 동부아남반도체 주식회사 | 박막 커패시터의 제조 방법 |
KR20070031621A (ko) * | 2005-09-15 | 2007-03-20 | 매그나칩 반도체 유한회사 | 반도체 소자 제조 방법 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105336574A (zh) * | 2014-08-07 | 2016-02-17 | 无锡华润上华半导体有限公司 | 氮化硅薄膜及mim电容的制作方法 |
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