KR100905786B1 - 반도체 소자 및 이를 갖는 반도체 패키지 - Google Patents
반도체 소자 및 이를 갖는 반도체 패키지 Download PDFInfo
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- KR100905786B1 KR100905786B1 KR1020070061249A KR20070061249A KR100905786B1 KR 100905786 B1 KR100905786 B1 KR 100905786B1 KR 1020070061249 A KR1020070061249 A KR 1020070061249A KR 20070061249 A KR20070061249 A KR 20070061249A KR 100905786 B1 KR100905786 B1 KR 100905786B1
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Abstract
Description
Claims (27)
- 제1 영역에 형성된 회로부 및 상기 제1 영역의 주변에 형성된 제2 영역에 형성된 주변부를 갖는 반도체 칩; 및상기 제1 및 제2 영역들을 덮고, 보이드가 형성되는 것을 방지하기 위해 상기 제1 영역으로부터 상기 제2 영역으로 연장된 보이드 제거부를 갖는 절연막을 포함하며,상기 보이드 제거부는 그루브 형상을 갖고, 상기 보이드 제거부는 상기 반도체 칩을 노출하는 개구인 것을 특징으로 하는 반도체 소자.
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- 삭제
- 제1항에 있어서,상기 보이드 제거부의 내부에는 퓨즈 박스가 배치된 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서,상기 제 1영역을 덮는 접착 필름을 더 포함하는 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서,상기 보이드 제거부는, 평면상에서 보았을 때, 십자 형상을 갖는 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서,상기 보이드 제거부는, 평면상에서 보았을 때, 일자 형상을 갖는 것을 특징으로 하는 반도체 소자.
- 제1항에 있어서,상기 보이드 제거부는, 평면상에서 보았을 때, 격자 형상을 갖는 것을 특징으로 하는 반도체 소자.
- 제1 영역을 갖는 회로부 및 상기 제1 영역의 주변에 배치된 제2 영역에 단속적으로 배치되며 상기 회로부와 연결된 퓨즈 박스들을 포함하는 반도체 칩; 및상기 제1 및 제2 영역을 덮고, 상기 제2 영역을 따라 상기 각 퓨즈 박스들을 동시에 노출하는 보이드 제거부를 갖는 절연막을 포함하는 것을 특징으로 하는 반 도체 소자.
- 제9항에 있어서,상기 보이드 제거부는 외부와 연통 되도록 상기 절연막의 측면까지 연장된 것을 특징으로 하는 반도체 소자.
- 제9항에 있어서,상기 보이드 제거부의 폭은 상기 퓨즈 박스의 폭과 실질적으로 동일한 것을 특징으로 하는 반도체 소자.
- 제9항에 있어서,상기 퓨즈 박스들은 상기 제2 영역을 따라 적어도 2열로 배치된 것을 특징으로 하는 반도체 소자.
- 제12항에 있어서,상기 보이드 제거부는 적어도 2열로 배치된 상기 퓨즈 박스들의 개수에 대응하여 형성된 것을 특징으로 하는 반도체 소자.
- 제13항에 있어서,적어도 2열로 배치된 상기 퓨즈 박스들을 각각 노출하는 상기 보이드 제거부 들과 연통 되는 개구 패턴을 포함하는 것을 특징으로 하는 반도체 소자.
- 제14항에 있어서,상기 각 보이드 제거부들은 제1 폭을 갖고, 상기 개구 패턴은 상기 제1 폭보다 넓은 제2 폭을 갖는 것을 특징으로 하는 반도체 소자.
- 접속 패드 및 볼 랜드를 갖는 기판;회로 영역을 갖는 회로부, 상기 회로 영역의 주변에 배치된 주변 영역에 단속적으로 배치되며 상기 회로부와 연결된 퓨즈 박스들 및 상기 기판과 마주하는 본딩 패드를 포함하는 반도체 칩;상기 회로 영역 및 상기 주변 영역을 덮고, 상기 주변 영역을 따라 상기 각 퓨즈 박스들을 동시에 노출하는 보이드 제거부를 갖는 절연막;상기 절연막 및 상기 기판을 부착하는 접합 부재; 및상기 본딩 패드와 상기 접속 패드를 전기적으로 연결하는 연결 부재를 포함하는 반도체 패키지.
- 제16항에 있어서,상기 보이드 제거부는 외부와 연통 되도록 상기 절연막의 측면까지 연장된 것을 특징으로 하는 반도체 패키지.
- 제16항에 있어서,상기 보이드 제거부의 폭은 상기 퓨즈 박스의 폭과 실질적으로 동일한 것을 특징으로 하는 반도체 패키지.
- 제16항에 있어서,상기 퓨즈 박스들은 상기 주변 영역을 따라 적어도 2열로 배치된 것을 특징으로 하는 반도체 패키지.
- 제19항에 있어서,상기 보이드 제거부는 적어도 2열로 배치된 상기 퓨즈 박스들의 개수에 대응하여 형성된 것을 특징으로 하는 반도체 패키지.
- 제20항에 있어서,적어도 2열로 배치된 상기 퓨즈 박스들을 각각 노출하는 상기 보이드 제거부들과 연통 되는 개구 패턴을 포함하는 것을 특징으로 하는 반도체 패키지.
- 제21항에 있어서,상기 각 보이드 제거부들은 제1 폭을 갖고, 상기 개구 패턴은 상기 제1 폭보다 넓은 제2 폭을 갖는 것을 특징으로 하는 반도체 패키지.
- 외부 접촉 단자를 갖는 베이스 기판;상기 베이스 기판 상에 배치되며 회로부가 형성된 제1 영역과 상기 제1 영역의 주변에 형성된 제2 영역을 갖는 제1 반도체 칩 및 상기 제1 반도체 칩들의 상기 제1 및 제2 영역들을 각각 덮고, 상기 제1 영역으로부터 상기 제2 영역으로 연장된 제 1보이드 제거부를 갖는 제1 절연막을 포함하는 제1 반도체 소자;상기 제1 반도체 소자 상에 배치되며, 회로부가 형성된 제3 영역과 상기 제3 영역의 주변에 형성된 제4 영역을 갖는 제2 반도체 칩 및 상기 제2 반도체 칩들의 상기 제3 및 제4영역들을 각각 덮고, 상기 제3 영역으로부터 상기 제4 영역으로 연장된 제2 보이드 제거부를 갖는 제2 절연막을 포함하는 제2 반도체 소자; 및상기 제1 및 제2 반도체 소자들 사이에 개재된 접착 부재를 포함하는 반도체 패키지.
- 제23항에 있어서,상기 접착 필름과 접촉되는 상기 제1 및 제2 절연막들에 각각 형성된 상기 보이드 제거부는 상기 제1 및 제2 절연막들에 형성된 그루브 및 개구인 것을 특징으로 하는 반도체 패키지.
- 제23항에 있어서,상기 제1 및 제2 보이드 제거부들은, 평면상에서 보았을 때, 십자 형상을 갖는 것을 특징으로 하는 반도체 패키지.
- 제23항에 있어서,상기 제1 및 제2 보이드 제거부들은, 평면상에서 보았을 때, 일자 형상을 갖는 것을 특징으로 하는 반도체 패키지.
- 제23항에 있어서,상기 제1 및 제2 보이드 제거부들은, 평면상에서 보았을 때, 격자 형상을 갖는 것을 특징으로 하는 반도체 패키지.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/852,579 US7755170B2 (en) | 2006-06-29 | 2007-09-10 | Semiconductor device and semiconductor package having the same |
US12/794,098 US7855437B2 (en) | 2006-06-29 | 2010-06-04 | Semiconductor device and semiconductor package having the same |
US12/943,367 US7928535B2 (en) | 2006-06-29 | 2010-11-10 | Semiconductor device and semiconductor package having the same |
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JPH10144723A (ja) * | 1996-11-12 | 1998-05-29 | Hitachi Ltd | 半導体装置の製造方法 |
JPH10173042A (ja) | 1996-12-13 | 1998-06-26 | Nec Corp | Soi基板 |
JP2002329825A (ja) | 2001-04-13 | 2002-11-15 | Stmicroelectronics Inc | シート接着層における制御されないボイドを除去する方法 |
KR20060072967A (ko) * | 2004-12-24 | 2006-06-28 | 주식회사 하이닉스반도체 | 에프비지에이 패키지 |
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JPH0878605A (ja) * | 1994-09-01 | 1996-03-22 | Hitachi Ltd | リードフレームおよびそれを用いた半導体集積回路装置 |
CN1146984C (zh) * | 1996-10-30 | 2004-04-21 | 日立化成工业株式会社 | 半导体封装用芯片支持基片、半导体装置及其制造方法 |
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JPH10144723A (ja) * | 1996-11-12 | 1998-05-29 | Hitachi Ltd | 半導体装置の製造方法 |
JPH10173042A (ja) | 1996-12-13 | 1998-06-26 | Nec Corp | Soi基板 |
JP2002329825A (ja) | 2001-04-13 | 2002-11-15 | Stmicroelectronics Inc | シート接着層における制御されないボイドを除去する方法 |
KR20060072967A (ko) * | 2004-12-24 | 2006-06-28 | 주식회사 하이닉스반도체 | 에프비지에이 패키지 |
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US7855437B2 (en) | 2010-12-21 |
US20080315369A1 (en) | 2008-12-25 |
US20100237473A1 (en) | 2010-09-23 |
US7755170B2 (en) | 2010-07-13 |
US20110057328A1 (en) | 2011-03-10 |
KR20080001623A (ko) | 2008-01-03 |
US7928535B2 (en) | 2011-04-19 |
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