KR100879706B1 - 디스플레이 구동회로 - Google Patents
디스플레이 구동회로 Download PDFInfo
- Publication number
- KR100879706B1 KR100879706B1 KR1020070065343A KR20070065343A KR100879706B1 KR 100879706 B1 KR100879706 B1 KR 100879706B1 KR 1020070065343 A KR1020070065343 A KR 1020070065343A KR 20070065343 A KR20070065343 A KR 20070065343A KR 100879706 B1 KR100879706 B1 KR 100879706B1
- Authority
- KR
- South Korea
- Prior art keywords
- voltage
- unit
- output
- voltages
- latch
- Prior art date
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Abstract
Description
Claims (8)
- 삭제
- 삭제
- 삭제
- 삭제
- 외부로부터 동일한 크기의 입력전압을 인가받아 서로 다른 크기의 전압을 각각 생성하는 제1 내지 제3 전압 생성부; 및상기 제2 전압 생성부와 연결되고, 상기 제2 전압 생성부로부터 출력되는 전압 중 하위 전압을 인가받아 기 설정된 시간 동안 접지시키는 래치업 방지부;를 포함하며,상기 래치업 방지부는,상기 제2 전압 생성부로부터 출력되는 전압 중 하위 전압의 공급을 제어하기 위한 제어신호를 출력하는 컨트롤 로직부;상기 컨트롤 로직부와 연결되고, 상기 제어신호와 사용자에 의해 기 설정된 디코딩신호를 인가받아 다수의 선택신호를 출력하는 디코딩부;상기 컨트롤 로직부 및 디코딩부와 연결되고, 상기 컨트롤 로직부로부터 제어신호 및 상기 디코딩부로부터 다수의 선택신호를 각각 인가받아 다수의 게이트 전압을 출력하는 레벨 시프팅부; 및상기 레벨 시프팅부와 연결되고, 상기 다수의 게이트 전압을 인가받아 상기 제2 전압 생성부로부터 출력되는 전압 중 하위 전압을 접지시키는 스위칭부;를 포함하는 것을 특징으로 하는 디스플레이 구동회로.
- 제5항에 있어서, 상기 스위칭부는,각각 게이트가 상기 레벨 시프팅부와 연결되고 소스가 상기 제2 전압 생성부와 연결되며 드레인이 접지된 다수의 스위칭수단을 포함하는 것을 특징으로 하는 디스플레이 구동회로.
- 제6항에 있어서,상기 스위칭수단의 각 소스는 상기 제2 전압 생성부로부터 출력되는 전압 중 하위 전압이 출력되는 출력단자와 연결되는 것을 특징으로 하는 디스플레이 구동회로.
- 제7항에 있어서,상기 다수의 스위칭수단은 NMOS 트랜지스터 또는 PMOS 트랜지스터 중 선택된 어느 하나인 것을 특징으로 하는 디스플레이 구동회로.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070065343A KR100879706B1 (ko) | 2007-06-29 | 2007-06-29 | 디스플레이 구동회로 |
TW097124368A TWI399720B (zh) | 2007-06-29 | 2008-06-27 | Display drive circuit |
JP2008169274A JP2009015323A (ja) | 2007-06-29 | 2008-06-27 | ディスプレイ駆動回路 |
US12/165,652 US8232985B2 (en) | 2007-06-29 | 2008-06-30 | Display driving circuit including a latch-up prevention unit |
CN2008101272582A CN101334977B (zh) | 2007-06-29 | 2008-06-30 | 显示器驱动电路 |
JP2012001305A JP5504289B2 (ja) | 2007-06-29 | 2012-01-06 | ディスプレイ駆動回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070065343A KR100879706B1 (ko) | 2007-06-29 | 2007-06-29 | 디스플레이 구동회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20090001162A KR20090001162A (ko) | 2009-01-08 |
KR100879706B1 true KR100879706B1 (ko) | 2009-01-22 |
Family
ID=40197544
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020070065343A KR100879706B1 (ko) | 2007-06-29 | 2007-06-29 | 디스플레이 구동회로 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8232985B2 (ko) |
JP (2) | JP2009015323A (ko) |
KR (1) | KR100879706B1 (ko) |
CN (1) | CN101334977B (ko) |
TW (1) | TWI399720B (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20130025057A (ko) | 2011-09-01 | 2013-03-11 | 삼성전자주식회사 | 디스플레이 드라이버용 전원 회로 |
US9857707B2 (en) | 2014-11-14 | 2018-01-02 | Canon Kabushiki Kaisha | Toner |
US11522361B2 (en) | 2019-02-19 | 2022-12-06 | Honeywell International Inc. | Single event latch-up protection for fault current residing inside the normal operating current range |
CN110120196B (zh) * | 2019-04-04 | 2021-05-07 | 深圳市华星光电半导体显示技术有限公司 | 电平转换控制电路与阵列基板驱动电路 |
CN113192450B (zh) * | 2021-04-27 | 2023-10-31 | 京东方科技集团股份有限公司 | 一种显示装置以及使用方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020080239A (ko) * | 2001-04-10 | 2002-10-23 | 가부시키가이샤 히타치세이사쿠쇼 | 전원회로를 내장한 반도체 집적회로, 액정표시 제어장치및 휴대용 전자기기 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3887093B2 (ja) * | 1998-01-29 | 2007-02-28 | 株式会社 沖マイクロデザイン | 表示装置 |
JP3809405B2 (ja) * | 2001-08-03 | 2006-08-16 | キヤノン株式会社 | 画像表示装置 |
JP3959253B2 (ja) * | 2001-10-02 | 2007-08-15 | 株式会社日立製作所 | 液晶表示装置及び携帯型表示装置 |
JP2003243613A (ja) * | 2002-02-20 | 2003-08-29 | Hitachi Ltd | 高耐圧アナログスイッチ集積回路 |
JP4315418B2 (ja) * | 2002-04-02 | 2009-08-19 | シャープ株式会社 | 画像表示装置 |
US7698573B2 (en) * | 2002-04-02 | 2010-04-13 | Sharp Corporation | Power source apparatus for display and image display apparatus |
JP3854905B2 (ja) * | 2002-07-30 | 2006-12-06 | 株式会社 日立ディスプレイズ | 液晶表示装置 |
KR100564575B1 (ko) * | 2003-09-23 | 2006-03-29 | 삼성전자주식회사 | 부하제어 부스팅 장치, 부하량에 따라 자동적으로부스팅을 결정하고 커패시터 수가 적은 부스팅 파워시스템 및 그 방법 |
JP2005189834A (ja) * | 2003-12-03 | 2005-07-14 | Renesas Technology Corp | 半導体装置およびその試験方法 |
JP4965069B2 (ja) * | 2004-10-21 | 2012-07-04 | ラピスセミコンダクタ株式会社 | 半導体集積回路 |
KR20060079593A (ko) * | 2005-01-03 | 2006-07-06 | 삼성전자주식회사 | 래치-업을 방지한 통합 구동 칩 및 이를 이용한 표시장치 |
JP4984391B2 (ja) * | 2005-01-07 | 2012-07-25 | カシオ計算機株式会社 | 表示駆動装置及び表示装置並びにその駆動制御方法 |
KR100751454B1 (ko) * | 2005-09-07 | 2007-08-23 | 삼성전자주식회사 | 디스플레이 장치 |
US7355437B2 (en) * | 2006-03-06 | 2008-04-08 | Altera Corporation | Latch-up prevention circuitry for integrated circuits with transistor body biasing |
KR100741471B1 (ko) * | 2006-09-29 | 2007-07-20 | 삼성전자주식회사 | 래치-업이 발생하지 않는 부스팅 스킴 |
US7817388B2 (en) * | 2008-03-27 | 2010-10-19 | Himax Technologies Limited | Latch-up protection circuit for LCD driver IC |
-
2007
- 2007-06-29 KR KR1020070065343A patent/KR100879706B1/ko active IP Right Grant
-
2008
- 2008-06-27 TW TW097124368A patent/TWI399720B/zh active
- 2008-06-27 JP JP2008169274A patent/JP2009015323A/ja active Pending
- 2008-06-30 US US12/165,652 patent/US8232985B2/en active Active
- 2008-06-30 CN CN2008101272582A patent/CN101334977B/zh active Active
-
2012
- 2012-01-06 JP JP2012001305A patent/JP5504289B2/ja active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020080239A (ko) * | 2001-04-10 | 2002-10-23 | 가부시키가이샤 히타치세이사쿠쇼 | 전원회로를 내장한 반도체 집적회로, 액정표시 제어장치및 휴대용 전자기기 |
Also Published As
Publication number | Publication date |
---|---|
TWI399720B (zh) | 2013-06-21 |
JP5504289B2 (ja) | 2014-05-28 |
TW200917196A (en) | 2009-04-16 |
US20090021505A1 (en) | 2009-01-22 |
JP2012118541A (ja) | 2012-06-21 |
CN101334977B (zh) | 2011-07-27 |
KR20090001162A (ko) | 2009-01-08 |
US8232985B2 (en) | 2012-07-31 |
CN101334977A (zh) | 2008-12-31 |
JP2009015323A (ja) | 2009-01-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106486082B (zh) | 移位寄存器及其驱动方法、栅极驱动装置 | |
US8395612B2 (en) | Display driving circuit and display driving circuit | |
US20150171833A1 (en) | Gate driver circuit outputting superimposed pulses | |
KR101809290B1 (ko) | 레벨 시프터, 인버터 회로 및 시프트 레지스터 | |
KR102656430B1 (ko) | 시프트 레지스터 및 이를 이용한 표시장치 | |
KR100370332B1 (ko) | 주사선 구동 회로를 갖는 평면 표시 장치, 및 그 구동 방법 | |
KR100879706B1 (ko) | 디스플레이 구동회로 | |
US7535451B2 (en) | Liquid crystal drive method, liquid crystal display system, and liquid crystal drive control device in which one specified bit is changed at a switch between a positive phase and a negative phase | |
CN102201192B (zh) | 电平移位电路、数据驱动器及显示装置 | |
JP3841083B2 (ja) | 昇圧回路、電源回路及び液晶駆動装置 | |
JP5577930B2 (ja) | 集積回路装置及び電子機器 | |
US7295198B2 (en) | Voltage booster circuit, power supply circuit, and liquid crystal driver | |
JP2009017546A (ja) | レベルシフタ、界面駆動回路及び映像表示系統 | |
US11100876B2 (en) | Latch circuit based on thin-film transistor, pixel circuit and driving method, display apparatus | |
CN101388187B (zh) | 应用于开关机的重置电路 | |
JP2006208517A (ja) | 半導体回路 | |
KR101747969B1 (ko) | 액정표시장치 | |
KR20070101474A (ko) | 연산 증폭기 | |
JP2001265297A (ja) | 走査線駆動回路およびその走査線駆動回路を有する平面表示装置ならびにその駆動方法 | |
KR101137855B1 (ko) | 표시장치의 구동회로 및 이의 구동방법 | |
KR20080061825A (ko) | 평판표시장치용 직류-직류 변환회로와 그 구동방법 | |
JP2000163002A (ja) | 半導体集積回路、液晶表示装置及び逆極性電圧生成回路 | |
KR20090072736A (ko) | 클럭신호 발생회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20121210 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20131217 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20141222 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20151217 Year of fee payment: 8 |
|
FPAY | Annual fee payment |
Payment date: 20161220 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20171218 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20181218 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20191217 Year of fee payment: 12 |