KR100860133B1 - 이온 주입에 의한 측벽 밀도의 국부적 증가 - Google Patents

이온 주입에 의한 측벽 밀도의 국부적 증가 Download PDF

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KR100860133B1
KR100860133B1 KR1020047000199A KR20047000199A KR100860133B1 KR 100860133 B1 KR100860133 B1 KR 100860133B1 KR 1020047000199 A KR1020047000199 A KR 1020047000199A KR 20047000199 A KR20047000199 A KR 20047000199A KR 100860133 B1 KR100860133 B1 KR 100860133B1
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South Korea
Prior art keywords
copper
forming
dielectric layer
layer
opening
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Expired - Fee Related
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KR1020047000199A
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English (en)
Korean (ko)
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KR20040015789A (ko
Inventor
애펠그렌에릭엠.
지슬트크리스챤
마틴제레미아이.
베서폴알.
청프레드
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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Publication of KR20040015789A publication Critical patent/KR20040015789A/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/40—Ion implantation into wafers, substrates or parts of devices into insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/086—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving buried masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020047000199A 2001-07-10 2002-06-12 이온 주입에 의한 측벽 밀도의 국부적 증가 Expired - Fee Related KR100860133B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/902,024 US6610594B2 (en) 2001-07-10 2001-07-10 Locally increasing sidewall density by ion implantation
US09/902,024 2001-07-10
PCT/US2002/018842 WO2003007367A1 (en) 2001-07-10 2002-06-12 Locally increasing sidewall density by ion implantation

Publications (2)

Publication Number Publication Date
KR20040015789A KR20040015789A (ko) 2004-02-19
KR100860133B1 true KR100860133B1 (ko) 2008-09-25

Family

ID=25415200

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020047000199A Expired - Fee Related KR100860133B1 (ko) 2001-07-10 2002-06-12 이온 주입에 의한 측벽 밀도의 국부적 증가

Country Status (7)

Country Link
US (1) US6610594B2 (https=)
EP (1) EP1405339A1 (https=)
JP (1) JP2004523132A (https=)
KR (1) KR100860133B1 (https=)
CN (1) CN1316589C (https=)
TW (1) TW573341B (https=)
WO (1) WO2003007367A1 (https=)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7049034B2 (en) * 2003-09-09 2006-05-23 Photronics, Inc. Photomask having an internal substantially transparent etch stop layer
TWI253684B (en) * 2003-06-02 2006-04-21 Tokyo Electron Ltd Method and system for using ion implantation for treating a low-k dielectric film
TWI302720B (en) * 2003-07-23 2008-11-01 Tokyo Electron Ltd Method for using ion implantation to treat the sidewalls of a feature in a low-k dielectric film
US20060051681A1 (en) * 2004-09-08 2006-03-09 Phototronics, Inc. 15 Secor Road P.O. Box 5226 Brookfield, Conecticut Method of repairing a photomask having an internal etch stop layer
KR100613346B1 (ko) * 2004-12-15 2006-08-21 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
EP1715517A1 (en) * 2005-04-22 2006-10-25 AMI Semiconductor Belgium BVBA Ion implantation of spin on glass materials
US7482267B2 (en) * 2005-04-22 2009-01-27 Ami Semiconductor Belgium Bvba Ion implantation of spin on glass materials
CN100499069C (zh) * 2006-01-13 2009-06-10 中芯国际集成电路制造(上海)有限公司 使用所选掩模的双大马士革铜工艺
US20100109155A1 (en) * 2008-11-05 2010-05-06 Chartered Semiconductor Manufacturing, Ltd. Reliable interconnect integration
FR2969375A1 (fr) 2010-12-17 2012-06-22 St Microelectronics Crolles 2 Structure d'interconnexion pour circuit intégré
KR101932532B1 (ko) 2012-06-22 2018-12-27 삼성전자 주식회사 반도체 장치 및 그 제조 방법
TWI509689B (zh) * 2013-02-06 2015-11-21 國立中央大學 介電質材料形成平台側壁的半導體製造方法及其半導體元件
US9231098B2 (en) 2013-10-30 2016-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanism for forming metal gate structure
CN105336666B (zh) * 2014-06-19 2019-06-18 中芯国际集成电路制造(上海)有限公司 基于金属硬掩膜的超低k互连的制造方法及制造的产品
US11270962B2 (en) * 2019-10-28 2022-03-08 Nanya Technology Corporation Semiconductor device and method of manufacturing the same
US11488857B2 (en) 2019-10-31 2022-11-01 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacture using a contact etch stop layer (CESL) breakthrough process
CN112750761A (zh) 2019-10-31 2021-05-04 台湾积体电路制造股份有限公司 半导体装置及其制造方法
US11257753B2 (en) * 2020-01-21 2022-02-22 Taiwan Semiconductor Manufacturing Company Ltd. Interconnect structure and method for manufacturing the interconnect structure
US11776895B2 (en) * 2021-05-06 2023-10-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method for manufacturing the same
US12469745B2 (en) * 2021-07-30 2025-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive structures with bottom-less barriers and liners

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5817572A (en) 1992-06-29 1998-10-06 Intel Corporation Method for forming multileves interconnections for semiconductor fabrication
US6114259A (en) 1999-07-27 2000-09-05 Lsi Logic Corporation Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage
US6225204B1 (en) 1998-07-28 2001-05-01 United Microelectronics Corp. Method for preventing poisoned vias and trenches
JP2001267418A (ja) * 2000-03-21 2001-09-28 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US6621780B2 (en) 1999-12-24 2003-09-16 Ricoh Company, Ltd. Optical recording/reproducing method and apparatus

Family Cites Families (9)

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Publication number Priority date Publication date Assignee Title
JP3015717B2 (ja) * 1994-09-14 2000-03-06 三洋電機株式会社 半導体装置の製造方法および半導体装置
JP3282496B2 (ja) * 1996-05-17 2002-05-13 松下電器産業株式会社 半導体装置の製造方法
US6197688B1 (en) * 1998-02-12 2001-03-06 Motorola Inc. Interconnect structure in a semiconductor device and method of formation
KR100279300B1 (ko) * 1998-05-11 2001-02-01 윤종용 금속 배선 연결 방법
JP2000164707A (ja) * 1998-11-27 2000-06-16 Sony Corp 半導体装置およびその製造方法
US6221780B1 (en) 1999-09-29 2001-04-24 International Business Machines Corporation Dual damascene flowable oxide insulation structure and metallic barrier
US6355555B1 (en) * 2000-01-28 2002-03-12 Advanced Micro Devices, Inc. Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer
US6444136B1 (en) * 2000-04-25 2002-09-03 Newport Fab, Llc Fabrication of improved low-k dielectric structures
US6329234B1 (en) * 2000-07-24 2001-12-11 Taiwan Semiconductor Manufactuirng Company Copper process compatible CMOS metal-insulator-metal capacitor structure and its process flow

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5817572A (en) 1992-06-29 1998-10-06 Intel Corporation Method for forming multileves interconnections for semiconductor fabrication
US6225204B1 (en) 1998-07-28 2001-05-01 United Microelectronics Corp. Method for preventing poisoned vias and trenches
US6114259A (en) 1999-07-27 2000-09-05 Lsi Logic Corporation Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage
US6621780B2 (en) 1999-12-24 2003-09-16 Ricoh Company, Ltd. Optical recording/reproducing method and apparatus
JP2001267418A (ja) * 2000-03-21 2001-09-28 Sanyo Electric Co Ltd 半導体装置及びその製造方法

Also Published As

Publication number Publication date
WO2003007367A1 (en) 2003-01-23
US20030013296A1 (en) 2003-01-16
CN1316589C (zh) 2007-05-16
KR20040015789A (ko) 2004-02-19
US6610594B2 (en) 2003-08-26
CN1579017A (zh) 2005-02-09
JP2004523132A (ja) 2004-07-29
EP1405339A1 (en) 2004-04-07
TW573341B (en) 2004-01-21

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